HAMBURG, Dec. 16, 2024 — The ISC 2025 conference announced that Mark Papermaster, CTO and EVP of AMD will present the opening keynote at the conference, Tuesday-Friday, June 10-13.
Papermaster will discuss AMD’s vision for the convergence of high performance computing and artificial intelligence, along with insights on how energy efficiency can be enhanced through advancements in silicon, system design, software, and other technologies.
“HPC and AI: A Path Towards Sustainable Innovation” will examine the importance of collaboration and the need for an open ecosystem. In an abstract shared with ISC, Papermaster highlighted that HPC and AI are intrinsically linked through their hardware, software, and the nature of their problems. Both fields also share a critical need for highly energy-efficient computing at scale. As a result, HPC and AI are converging in a way that is set to reshape much of the industry in the coming years. Leading supercomputers, such as the Frontier and El Capitan exascale systems in the U.S., and LUMI and HPC6 in Europe are pushing the boundaries of performance while prioritizing energy efficiency.
A more detailed keynote abstract will be published by mid-March, coinciding with the opening of registration and the release of the four-day event schedule and speaker lineup. ISC 2025 anticipates attendance of 3,500 users, practitioners, and vendors from the fields of HPC, AI, high performance data analytics and quantum computing.
At AMD, Papermaster sets the company’s technical direction and overseeing product development. He has led the redesign of engineering processes at AMD and was instrumental in developing the award-winning “Zen” AMD’s x86 CPU family, high performance GPUs, and the company’s modular design approach, known as Infinity Architecture. He also manages the IT department, which provides AMD’s computing infrastructure and services.
With over 40 years of engineering experience, he has held leadership roles in managing the development of a diverse range of products, including microprocessors, mobile devices, and high performance servers. Before joining AMD in October 2011 as CTO and SVP, Papermaster led Cisco’s Silicon Engineering Group and served as Senior Vice President of Devices Hardware Engineering at Apple, specifically for the iPod and iPhone. Additionally, he held various roles at IBM focusing on technology development, including work on blade servers and microprocessor technology for mainframes, servers, and storage products.
In October 2024, he was appointed Vice Chair of the U.S. Department of Commerce Industrial Advisory Committee (IAC) for the CHIPS for America program. He actively participates on several boards and committees, including the Global Semiconductor Alliance Board of Directors, IEEE Industry Advisory Board, The University of Texas at Austin Cockrell School of Engineering Advisory Board, The University of Texas President’s Austin Innovation Board, and the Purdue University Semiconductor Degrees Leadership Board.
Papermaster earned his bachelor’s degree from the University of Texas at Austin and master’s degree from the University of Vermont, both in electrical engineering.
