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GPU Hackathon gears up for Future Perlmutter Supercomputer

NERSC recently hosted its first user hackathon to begin preparing key codes for the next-generation architecture of the Perlmutter system. Over four days, experts from NERSC, Cray, and NVIDIA worked with application code teams to help them gain new understanding of the performance characteristics of their applications and optimize their codes for the GPU processors in Perlmutter. “By starting this process early, the code teams will be well prepared for running on GPUs when NERSC deploys the Perlmutter system in 2020.”

NEC-X Opens Vector Engine Data Acceleration Center in Silicon Valley

Today NEC-X launched the Vector Engine Data Acceleration Center (VEDAC) at its Silicon Valley facility. This new VEDAC is one of the company’s many offerings to innovators, makers and change agents. The NEC X organization is focused on fostering big data innovations using NEC’s emerging technologies while tapping into Silicon Valley’s rich ecosystem. “We are gratified to see the developing innovations that are taking advantage of the cutting-edge technologies from NEC’s laboratories.”

Video: Enabling Applications to Exploit SmartNICs and FPGAs

Sean Hefty and Venkata Krishnan from Intel gave this talk at the OpenFabrics Workshop in Austin. “Advances in Smart NIC/FPGA with integrated network interface allow acceleration of application-specific computation to be performed alongside communication. Participants will learn about the potential for Smart NIC/FPGA application acceleration and will have the opportunity to contribute application expertise and domain knowledge to a discussion of how Smart NIC/FPGA acceleration technology can bring individual applications into the Exascale era.”

GPU Technology Conference to put HPC and Ai front and center

NVIDIA’s GPU Technology Conference (GTC) kicks off today in Silicon Valley. In this video, Ned Finkle from NVIDIA previews some of the public sector sessions this week at GTC. “GTC is the premier AI and deep learning conference, providing training, insights, and direct access to experts from leading research institutions and national labs. At GTC, you can explore hundreds of sessions on cutting edge AI research and applications across industries.”

Optalysys launches FT:X 2000 – The world’s first commercial optical processing system

Today Optalysys announced the FT:X 2000, the world’s first optical co-processor system for Ai computing. “It is a really exciting time in optical computing,” said Dr. Nick New, Optalysys CEO and Founder. “As we approach the commercial launch of our main optical co-processor systems, we are seeing a surge in interest in optical methods, which are needed to provide the next level of processing capability across multiple industry sectors. We are on the verge of an optical computing revolution and it’s fantastic to be leading the way.”

Intel Pushes the Envelope at SC18

Intel has a long history of making important announcements at the annual Supercomputer shows, and this year was no exception. This guest post from Intel covers what new technology was front and center from Intel at SC18, including its Cascade Lake advanced performance processors, Intel Optane Persistent Memory and more. Learn more about these new technologies designed to accelerate the convergence of high-performance computing and AI.

Xilinx Steps Up with Alveo FPGA boards and Versal Adaptive Compute Acceleration Platform

Today FPGA maker Xilinx unveiled Versal, “the industry’s first adaptive compute acceleration platform (ACAP)”. The company also announced new Alveo FPGA cards, which the company claims can deliver “4X the performance of GPUs, 90X the performance of CPUs, plus unprecedented adaptability across workloads.” AMD, one of the Xilinx partners that is showcasing products based on the new Alveo boards, announced a server that will set a new world record for real-time AI inference processing, with a mind-boggling 30,000-images-per-second inference throughput.

Intel Beefs up FPGA Line

Today Intel introduced the Intel Programmable Acceleration Card (PAC) with Intel Stratix 10 SX FPGA. The card leverages the Acceleration Stack for Intel Xeon CPU with FPGAs, providing data center developers a robust platform to deploy FPGA-based accelerated workloads. 

Radio Free HPC Looks at Hot Chips for 2018

In this podcast, the Radio Free HPC team looks at the latest developments in processor technology coming out of the recent Hot Chips conference. “The HOT CHIPS conference typically attracts more than 500 attendees from all over the world. It provides an opportunity for chip designers, computer architects, system engineers, press and analysts, as well as attendees from national laboratories and academia to mix, mingle and see presentations on the latest technologies and products.”

Intel HPC Technology: Fueling Discovery and Insight with a Common Foundation

To remain competitive, companies, academic institutions, and government agencies must tap the data available to them to empower scientific breakthroughs and drive greater business agility. This guest post explores how Intel’s scalable and efficient HPC technology portfolio accelerates today’s diverse workloads.