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HPC Network Stack on ARM

Pavel Shamis from ARM gave this talk at the MVAPICH User Group. “With the emerging availability HPC solutions based on ARM CPU architecture, it is important to understand how ARM integrates with the RDMA hardware and HPC network software stack. In this talk, we will overview ARM architecture and system software stack. We will discuss how ARM CPU interacts with network devices and accelerators. In addition, we will share our experience in enabling RDMA software stack and one-sided communication libraries (Open UCX, OpenSHMEM/SHMEM) on ARM and share preliminary evaluation results.”

Argonne Annouces Early Science Projects for Aurora Supercomputer

Argonne has selected 10 computational science and engineering research projects for its Aurora Early Science Program starting this month. Aurora, a massively parallel, manycore Intel-Cray supercomputer, will be ALCF’s next leadership-class computing resource and is expected to arrive in 2018. The Early Science Program helps lay the path for hundreds of other users by doing actual science, using real scientific applications, to ready a future machine. “As with any bleeding edge resource, there’s testing and debugging that has to be done,” said ALCF Director of Science Katherine Riley.

Superfacility – How New Workflows in the DOE Office of Science are Changing Storage Requirements

Katie Antypas from NERSC presented this talk at the 2016 MSST conference. Katie is the Project Lead for the NERSC-8 system procurement, a project to deploy NERSC’s next generation supercomputer in mid-2016. The system, named Cori, (after Nobel Laureate Gerty Cori) will be a Cray XC system featuring 9300 Intel Knights Landing processors. The Knights Landing processors will have over 60 cores with 4 hardware threads each and a 512 bit vector unit width. It will be crucial that users can exploit both thread and SIMD vectorization to achieve high performance on Cori.”