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Call for Abstracts: Intel HPC Developer Conference at SC17

“The Intel HPC Developer Conference 2017 has become the place for developers to learn about the latest trends, developments, and the future of HPC. By submitting an abstract and speaking at the conference you will be able to reach top-level decision makers within the HPC industry.”

CERN openlab Joins Intel Modern Code Developer Challenge

James Reinders writes that a new Intel Modern Code Developer Challenge has teamed up with CERN openlab. “It is always an exciting time when I get to announce a Modern Code Developer Challenge from my friends at Intel, but it is even more special when I get to announce a collaboration with the brilliant minds at CERN. Beginning this month (July 2017), and running for nine weeks, five exceptional students participating in the CERN openlab Summer Student Programme are working to research and develop solutions for five modern-code-centered challenges.”

Video: Supermicro Showcases Machine Learning Solutions on Intel Architecture

In this video from the Intel HPC Developer Conference, Akira Sano from Supermicro describes the company’s Machine Learning Solutions on Intel Architecture. “Our server systems, subsystems and accessories are architecturally designed to provide high levels of reliability, quality and scalability, thereby enabling our customers benefits in the areas of compute performance, density, thermal management and power efficiency to lower their overall total cost of ownership.”

Scaling Machine Learning Software with Allinea Tools

“The majority of deep learning frameworks provide good out-of-the-box performance on a single workstation, but scaling across multiple nodes is still a wild, untamed borderland. This discussion follows the story of one researcher trying to make use of a significant compute resource to accelerate learning over a large number of CPUs. Along the way we note how to find good multiple-CPU performance with Theano* and TensorFlow*, how to extend a single-machine model with MPI and optimize its performance as we scale out and up on both Intel Xeon and Intel Xeon Phi architectures.”

Machine Learning and HPC Converge at NERSC

In this video from the Intel HPC Developer Conference, Prabhat from NERSC describes how high performance computing techniques are being used to scale Machine Learning to over 100,000 compute cores. “Using TB-sized datasets from three science applications: astrophysics, plasma physics, and particle physics, we show that our implementation can construct kd-tree of 189 billion particles in 48 seconds on utilizing ∼50,000 cores.”

Using Machine Learning to Avoid the Unwanted

In this video from the Intel HPC Developer Conference, Justin Gottschlich, PhD from Intel describes how the company doubling down on Anomaly Detection using Machine Learning and Intel technologies. “In this talk, we present future research directions at Intel Labs using deep learning for anomaly detection and management. We discuss the required machine learning characteristics for such systems, ranging from zero positive learning, automatic feature extraction, and real-time reinforcement learning. We also discuss the general applicability of such anomaly detection systems across multiple domains such as data centers, autonomous vehicles, and high performance computing.”

Accelerating Machine Learning on Intel Platforms

In this video from the Intel HPC Developer Conference, Ananth Sankaranarayanan from Intel describes how the company is optimizing Machine Learning frameworks for Intel platforms. Open source frameworks often are not optimized for a particular chip, but bringing Intel’s developer tools to bear can result in significant speedups. For meaningful impact and business value, organizations require that the time to train a deep learning model be reduced from weeks to hours. In this talk, we will present the details of the optimization and characterization of Intel-Caffe and the support of new deep learning convolutional neural network primitives in the Intel Math Kernel Library.”

Preparing Developers for Tomorrow’s Systems

In this special guest feature, Bill Mannel from Hewlett Packard Enterprise writes that upcoming Intel HPC Developer Conference in Salt Lake City is a great opportunity to learn about code modernization for the next generation of high performance computing applications. “As computing systems grow increasingly complex and new architecture designs become mainstream, training developers to write code which runs on future HPC systems will require a collaborative environment and the expertise of the best and brightest in the industry.”

Radio Free HPC Does the Day-by-Day SC16 Preview Show

In this podcast, the Radio Free HPC team previews the ancillary events around SC16 in Salt Lake City. With a full week in store, this could be the best conference yet. After our event roundup, they share their predictions for SC16 total attendance numbers.

Keynotes Announced for Intel HPC Developer Conference at SC16

The Intel HPC Developer Conference at SC16 has announced its keynote speakers. Jonathan Cohen and Kai Li from Princeton will present, Going Where Neuroscience and Computer Science Have Not Gone Before. “Taking place Nov. 12-13 in Salt Lake City, the Intel HPC Developer Conference will bring together developers from around the world to discuss code modernization in high-performance computing.”