“With our latest innovations incorporating Intel Xeon Phi processors in a performance and density optimized Twin architecture and 100Gbps OPA switch for high bandwidth connectivity, our customers can accelerate their applications and innovations to address the most complex real world problems.”
Video: Matching the Speed of SGI UV with Multi-rail LNet for Lustre
July 27, 2016 by
Olaf Weber from SGI presented this talk at LUG 2016. “In collaboration with Intel, SGI set about creating support for multiple network connections to the Lustre filesystem, with multi-rail support. With Intel Omni-Path and EDR Infiniband driving to 200Gb/s or 25GB/s per connection, this capability will make it possible to start moving data between a single SGI UV node and the Lustre file system at over 100GB/s.”
Kyoto University Thinks Widening SIMD Will be Key to Performance Gains in New Intel Xeon Phi processor-based Cray System
July 13, 2016 by
“With an imminent switchover to a new Cray system with next-generation Intel Xeon Phi Processors (codenamed Knights Landing) planned for October, the ACCMS team at Kyoto University is eagerly looking forward to a potential two-fold application performance improvements from its new system. But the lab is also well aware that there is significant recoding work ahead before the promise of the new manycore technology can be realized.”
Supermicro Showcases Intel Xeon Phi and Nvidia P100 Solutions at ISC 2016
July 7, 2016 by
At ISC 2016, Supermicro debuted the latest innovations in HPC architectures and technologies including a 2U 4-Node server supporting new Intel Xeon Phi processors (formerly code named Knights Landing) with integrated or external Intel Omni-Path fabric option, together with associated 4U/Tower development workstation; 1U SuperServer supporting up to 4 GPU including the next generation P100 GPU; Lustre High Performance File system; and 1U 48-port top-of-rack network switch with 100Gbps Intel Omni-Path Architecture (OPA) providing a unique HPC cluster solution offering excellent bandwidth, latency and message rate that is highly scalable and easily serviceable.
Intel Furthers Machine Learning Capabilities
June 29, 2016 by
“Intel provided a wealth of machine learning announcements following the Intel Xeon Phi processor (formerly known as Knights Landing) announcement at ISC’16. Building upon the various technologies in Intel Scalable System Framework, the machine learning community can expect up to 38% better scaling over GPU-accelerated machine learning and an up to 50x speedup when using 128 Intel Xeon Phi nodes compared to a single Intel Xeon Phi node. The company also announced an up to 30x improvement in inference performance (also known as scoring or prediction) on the Intel Xeon E5 product family due to an optimized Intel Caffe plus Intel Math Kernel Library (Intel® MKL) package.”
Building Bridges to the Future
June 8, 2016 by
“The Pittsburgh Supercomputing Center recently added Bridges to its lineup of world-class supercomputers. Bridges is designed for uniquely flexible, interoperating capabilities to empower research communities that previously have not used HPC and enable new data-driven insights. It also provides exceptional performance to traditional HPC users. It converges the best of High Performance Computing (HPC), High Performance Data Analytics (HPDA), machine learning, visualization, Web services, and community gateways in a single architecture.”
See What’s New from Intel at ISC 2016
June 7, 2016 by
New HPC products and technologies. Compelling demos. Insights from top Intel HPC architects. More than 60 presentations from Intel and industry experts. Additional details about Intel® Scalable System Framework. Intel will have something for everyone at this year’s International Supercomputing Conference in Frankfurt, Germany.
Disruptive Opportunities and a Path to Exascale: A Conversation with HPC Visionary Alan Gara of Intel
May 25, 2016 by
“We want to encourage and support that collaborative behavior in whatever way we can, because there are a multitude of problems in government agencies and commercial entities that seem to have high performance computing solutions. Think of bringing together the tremendous computational expertise you find from the DOE labs with the problems that someone like the National Institutes of Health is trying to solve. You couple those two together and you really can create something amazing that will affect all our lives. We want to broaden their exposure to the possibilities of HPC and help that along. It’s important, and it will allow all of us in HPC to more broadly impact the world with the large systems as well as the more moderate-scale systems.”
