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Nimbus Data Patents Parallel Memory Architecture

Today Nimbus Data announced the award of a patent for its non-blocking all-flash architecture. Nimbus Data’s Parallel Memory Architecture scales capacity and performance linearly within each ExaFlash system, offering latency and throughput performance up to 6x faster scale-up designs. “Conventional HDD-centric architectures employed by the majority of all-flash array vendors trap flash performance behind legacy shared bus and scale-up designs,” stated Thomas Isakovich, CEO and Founder. “Now patented, Nimbus Data’s Parallel Memory Architecture overcomes the limitations of generic off-the-shelf servers, capturing the full performance potential of all-flash technology.”