SiPearl, the company designing the Rhea microprocessor for the European exascale supercomputer, announced it has passed a milestone before the chip’s scheduled 2022 launch. The company said it is moving into an “accelerated simulation phase” on the Veloce Strato hardware emulator from Siemens Digital Industries Software. SiPeal said the hardware emulation platform provides its chips […]
SiPearl Says Rhea Exascale Chip Has Entered Accelerated Simulation Phase for 2022 Launch
March 11, 2021 by
European Processor Initiative Reaches Important Milestones in First Year
November 4, 2019 by
The European Processor Initiative (EPI) has announced the completion of important milestones in its first year. “The first-generation chip family, named Rhea, will include Arm ZEUS architecture general purpose cores and prototypes of high energy-efficient accelerator tiles: RISC-V based (EPAC), Multi-Purpose Processing Array (MPPA), embedded FPGA (eFPGA) and cryptography HW engine. First Rhea chips will be fabricated in N6 technology aiming at the highest processing capabilities and energy efficiency.”
