Beaverton, OR – April 8, 2025 – The UALink Consortium today announced the ratification of the UALink 200G 1.0 Specification, which defines a low-latency, high-bandwidth interconnect for communication between accelerators and switches in AI computing pods. The UALink 1.0 Specification enables 200G per lane scale-up connection for up to 1,024 accelerators within an AI computing pod, delivering the […]
Ultra Accelerator Link Consortium Incorporates
October 29, 2024 by
Beaverton, Ore. – October 29, 2024 – The Ultra Accelerator Link (UALink) Consortium, led by board members from AMD, Amazon Web Services (AWS), Astera Labs, Cisco, Google, Hewlett Packard Enterprise (HPE), Intel, Meta and Microsoft, have announced the incorporation of the consortium and are extending an invitation for membership to the community. The UALink Promoter […]
HPC News Bytes 20240603: New Nvidia, AMD Chips at Computex, Industry Heavies Back UALink, Europe’s 2nd Exascale, Approaching AI Bubble?
June 3, 2024 by
A good June day to you! What follows is a rapid (7:59) run-though of the latest news from the world of HPC-AI, including: At Computex 2024: Nvidia Rubin and Vera ….
