AMD Licenses Arteris Network-on-Chip Interconnect IP

CAMPBELL, Calif. – August 4, 2025 – Arteris, Inc. (Nasdaq: AIP), a provider of semiconductor system IP for accelerating system-on-chip (SoC) creation, today announced AMD (Nasdaq: AMD) has licensed FlexGen network-on-chip (NoC) interconnect IP for its next generation of AI chiplet design.

FlexGen, Arteris’ NoC IP technology, will provide data transport in AMD chiplets powering AI across the company’s portfolio, from data centers to edge and end devices.

The strategic combination and interoperability of Arteris’ FlexGen NoC IP with the AMD Infinity Fabric interconnect underscores the increasing complexity of modern SoCs and chiplet-based architectures, which now require multiple specialized interconnects or NoCs to meet the demands of modern electronic systems.

“We are excited to collaborate and expand our relationship with AMD, a company recognized globally for its innovation in high performance computing,” said K. Charles Janac, president and CEO of Arteris. “With modern chiplets each having between 5 and 20 interconnect networks for data transport, our FlexGen NoC IP will work hand in hand with AMD’s Infinity Fabric to accelerate the performance and scalability required by today’s most demanding and diverse applications. This latest engagement with AMD exemplifies the transformative impact of Arteris’ NoC technology in delivering next-generation silicon solutions for a wide range of markets from the data center to the edge.”

“AMD is driving innovations that scale AI from cloud to client by continually developing leadership computing technologies and best-in-class IP,” said Mydung Pham

Corporate Vice President Silicon Design Engineering, AMD. “Integrating Arteris’ FlexGen NoC IP technology into a range of AMD chiplets, we can automate interconnect configuration and enable seamless connectivity among SoC components while strengthening the best end-to-end AI compute portfolio in the industry.”

FlexGen, Arteris’ latest NoC IP, is intended to make designing SoCs more efficient and to optimize wire length, reduce latency, and improve power efficiency, addressing the communication and performance needs of increasingly complex multi-die and chiplet-based designs. FlexGen can be utilized as an independent interconnect solution or in combination with proprietary interconnect technology to accelerate design iterations and time to market schedules.