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MLPerf-HPC Working Group seeks participation

In this special guest feature, Murali Emani from Argonne writes that a team of scientists from DoE labs have formed a working group called MLPerf-HPC to focus on benchmarking machine learning workloads for high performance computing. “As machine learning (ML) is becoming a critical component to help run applications faster, improve throughput and understand the insights from the data generated from simulations, benchmarking ML methods with scientific workloads at scale will be important as we progress towards next generation supercomputers.”

Panasas ActiveStor Solution: Architectural Overview

Panasas has released this timely new white paper “Panasas ActiveStor Solution: Architectural Overview.” The Panasas ActiveStor architecture running the PanFS storage operating system breaks through the performance constraints of other parallel file systems. The comprehensive and tightly integrated solution enables high-performance direct parallel access to petabytes of data while avoiding the stability problems inherent in legacy NAS systems as they grow.

Video: RISC-V momentum around the world, from edge to HPC

In this keynote talk from the 2020 HiPEAC conference, RISC-V Foundation Chief Executive Calista Redmond explains how the RISC-V open-source instruction set architecture is gathering momentum around the world, finding applications across the compute continuum from edge to high-performance computing. “The RISC-V ecosystem is poised to significantly grow over the next five years. Semico Research predicts that the market will consume a total of 62.4 billion RISC-V central processing unit (CPU) cores by 2025!”

Podcast: Co-Design for Online Data Analysis and Reduction at Exascale

In this Let’s Talk Exascale podcast, Ian Foster from Argonne National Lab describes how the CODAR project at ECP is addressing the needs for data reduction, analysis, and management in the exascale era. “When compressing data produced by a simulation, the idea is to keep the parts that are scientifically interesting and toss those that are not. However, every application and, perhaps, every scientist, has a different definition of what “interesting” means in that context. So, CODAR has developed a system called Z-checker to enable users to monitor the compression method.”

Video: A Preview of SC20 in Atlanta

In this video, SC20 General Chair Christine E. Cuicchi from the DoD Modernization Program previews the Supercomputing conference coming to Atlanta in November. “Christine Cuicchi is director of the Navy Department of Defense Supercomputing Resource Center (Navy DSRC), operated by the Commander, Naval Oceanography and Meteorology Command (CNMOC). The center provides HPC, storage, networks, and computational expertise which are available to over 2,500 RDT&E, S&T, and acquisition professionals in the DoD.”

Big Compute Fireside Chat with Sam Altman from OpenAI

In this video from the Big Compute 2020 event, Sam Altman from the OpenAI research laboratory discusses artificial intelligence  Shawn Hansen, COO of Rescale. “I think of the most exciting developments in the field in the last few years has been how good AI for natural language is getting. I think we are going to see an explosion in the next few years of systems that can really process, understand, and interact with general language. It will, I think, be the first way that people really feel powerful AI. Because you’ll be able to interact with the systems like you do by talking to somebody else. You’ll be able to have dialogue that actually makes sense. And computers will be able to process huge volumes of text that are sort of very unstructured.”

oneAPI: Single Programming Model to Deliver Cross-Architecture Performance

Bill Savage from Intel gave this talk at the Intel HPC Developer Conference. “Learn about oneAPI, the new Intel-led industry initiative to deliver a high-performance unified programming model specification spanning CPU, GPU, FPGA, and other specialized architectures. It includes the Data Parallel C++ cross-architecture language, a set of libraries, and a low-level hardware interface. Intel oneAPI Beta products are also available for developers who want to try out the programming model and influence its evolution.”

Swiss Conference & HPCXXL User Group Events Return to Lugano

The Swiss National Supercomputing Centre will host the 11th annual Swiss Conference and bi-annual HPCXXL Winter Meeting April 6-9 in Lugano, Switzerland. “Explore the domains and disciplines driving change and progress at an unprecedented pace and join us at the Swiss HPC Conference. Gather with fellow colleagues, a recognizable lineup of industry giants, startups, technology innovators and renowned subject matter experts to share insights on the tools, techniques and technologies that are bringing private and public research communities and interests together and inspiring entirely new possibilities.”

Podcast: Preparing for HPC & AI Convergence in the Enterprise

In this interview, Dr. Meyer discusses AMAX’s focus on appliances for storage, cloud, and hyper-scale integration. Dr. Meyer goes into more depth about why training in AI is now moving to deploying models at the edge, and why 2nd Generation Intel Xeon Scalable processors can be a good fit for such tasks given their advancements in machine learning and security technologies.

CUDA-Python and RAPIDS for blazing fast scientific computing

Abe Stern from NVIDIA gave this talk at the ECSS Symposium. “We will introduce Numba and RAPIDS for GPU programming in Python. Numba allows us to write just-in-time compiled CUDA code in Python, giving us easy access to the power of GPUs from a powerful high-level language. RAPIDS is a suite of tools with a Python interface for machine learning and dataframe operations. Together, Numba and RAPIDS represent a potent set of tools for rapid prototyping, development, and analysis for scientific computing. We will cover the basics of each library and go over simple examples to get users started.”