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Gravitational Waves: The Role of Computing in Opening a New Field of Astronomy

Dr. Joshua L. Willis from the California Institute of Technology and Dan Stanzione from TACC gave this talk at the Intel HPC Developer Conference. “These discoveries mark the beginning of gravitational wave astronomy, and in this talk we will highlight what we have learned and hope to learn in this new field, pointing out many of the ways in which high-throughput and high-performance computing have been essential to its progress.”

Call for Papers: International Workshop on Accelerators and Hybrid Exascale Systems

The eight annual  International Workshop on Accelerators and Hybrid Exascale Systems (AsHES) has issued its Call for Papers. Held in conjunction with the 32nd IEEE International Parallel and Distributed Processing Symposium, the AsHES Workshop takes place May 23 in Vancouver, Canada. “This workshop focuses on understanding the implications of accelerators and heterogeneous designs on the hardware systems, porting applications, performing compiler optimizations, and developing programming environments for current and emerging systems. It seeks to ground accelerator research through studies of application kernels or whole applications on such systems, as well as tools and libraries that improve the performance and productivity of applications on these systems.”

Intel’s Al Gara Presents: Technology Opportunities Like Never Before

Al Gara from gave this talk at the Intel HPC Developer Conference in Denver. “Technology visionaries architecting the future of HPC and AI will share the key challenges as well as Intel’s direction. The talk will cover the adaptation of AI into HPC workflows, along their perspective architectural developments, upcoming transitions and range of solutions, technology opportunities, and the driving forces behind them.”

AI Hardware to Support the Artificial Intelligence Software Ecosystem

Balance ratios are key to understanding the plethora of AI hardware solutions that are being developed or are soon to become available. This post from an insideHPC Special Report explores AI hardware options to support the growing artificial intelligence software ecosystem. 

Micron and Intel to continue joint development of 3D NAND Memory through 2019

Today Micron and Intel announced an update to their successful NAND memory joint development partnership that has helped the companies develop and deliver industry-leading NAND technologies to market. “The companies have agreed to complete development of their third-generation of 3D NAND technology, which will be delivered toward the end of this year and extending into early 2019. Beyond that technology node, both companies will develop 3D NAND independently in order to better optimize the technology and products for their individual business needs.”

Radio Free HPC Looks at Spectre and Meltdown Exploits

In this podcast, the Radio Free HPC team looks at the performance ramifications of the Spectre and Meltdown exploits that affect processors from Intel, AMD, and many others. While patches are on the way, the performance hit from these patches could be as high as twenty or thirty percent in some cases.

The AI Future is Closer than it Seems

Gadi Singer gave this talk at the Intel HPC Developer Conference in Denver. “Technology visionaries architecting the future of high-performance computing and artificial intelligence (AI) will share the key challenges as well as Intel’s direction. The talk will cover the adaptation of AI into HPC workflows, along their perspective architectural developments, upcoming transitions and range of solutions, technology opportunities, and the driving forces behind them.”

Video: Deep Learning for Science

Prabhat from NERSC and Michael F. Wehner from LBNL gave this talk at the Intel HPC Developer Conference in Denver. “Deep Learning has revolutionized the fields of computer vision, speech recognition and control systems. Can Deep Learning (DL) work for scientific problems? This talk will explore a variety of Lawrence Berkeley National Laboratory’s applications that are currently benefiting from DL.”

Intel Omni-Path Architecture: The Real Numbers

In this slidecast, Joe Yaworski from Intel describes the Intel Omni-Path architecture and how it scales performance for a wide range of HPC applications. He also shows why recently published benchmarks have not  reflected the real performance story.

Intel tackles FPGA HPC Memory Bottleneck

Intel recently announced the availability of the Intel Stratix 10 MX FPGA, the industry’s first field programmable gate array (FPGA) with integrated HBM2. By integrating the FPGA and the HBM2, Intel Stratix 10 MX FPGAs offer up to 10 times the memory bandwidth when compared when compared to standard DDR 2400 DIMM.