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Lenovo and Intel to Bring High-End HPC Capabilities to more users with Project Everyscale

In this video, Trish Damkroger from Intel and Scott Tease from Lenovo describe their collaboration on Project Everyscale. “With Project Everyscale, our goal is to democratize exascale technologies and bring leading Xeon scalable processors, accelerators, storage, fabrics, software and more to HPC customers of every scale or any workload.”

Lenovo and Intel team up for Harvard Supercomputer and New Exascale Visionary Council

Today Lenovo announced the deployment of Cannon, Harvard University’s first liquid-Cooled supercomputer. Developed in cooperation with Intel, the new system’s advanced supercomputing infrastructure will enable discoveries into areas such earthquake forecasting, predicting the spread of disease, and star formation. In related news, Lenovo and Intel announced the creation of an exascale visionary council called Project Everyscale. The project mission is to enable broad adoption of exascale-focused technologies for organizations of all sizes.

HPE Tackles AI Ops R&D for Energy Efficiency, Sustainability and Resiliency in Data Centers

Today HPE announced an AI Ops R&D collaboration with NREL to develop AI and Machine Learning technologies to automate and improve operational efficiency, including resiliency and energy usage, in data centers for the exascale era. The effort is part of NREL’s ongoing mission as a world leader in advancing energy efficiency and renewable energy technologies to create and implement new approaches that reduce energy consumption and lower operating costs.

Intel Unveils New GPU Architecture and oneAPI Software Stack for HPC and AI

Today at SC19, Intel unveiled its new GPU architecture optimized for HPC and AI as well as an ambitious new software initiative called oneAPI that represents a paradigm shift from today’s single-architecture, single-vendor programming models. “HPC and AI workloads demand diverse architectures, ranging from CPUs, general-purpose GPUs and FPGAs, to more specialized deep learning NNPs which Intel demonstrated earlier this month,” said Raja Koduri, senior vice president, chief architect, and general manager of architecture, graphics and software at Intel. “Simplifying our customers’ ability to harness the power of diverse computing environments is paramount, and Intel is committed to taking a software-first approach that delivers unified and scalable abstraction for heterogeneous architectures.”

Are You Ready for the Exascale Era? Find Out at SC19

As we head into the biggest supercomputing event of the year, all eyes are on exascale. The frontrunners in the race to exascale, including our friends over at Altair, will convene at SC19 in Denver this November to share updates, address challenges, and help paint the picture of an exascale-fueled future for HPC.

Cray and Fujitsu to bring Game-Changing Arm A64FX Processor to Global HPC Market

Today Cray and Fujitsu announced a partnership to offer high performance technologies for the exascale era. Under the alliance agreement, Cray is developing the first-ever commercial supercomputer powered by the Fujitsu A64FX Arm-based processor with high-memory bandwidth (HBM) and supported on the proven Cray CS500 supercomputer architecture and programming environment.

Interview: Advancing HPC in the UK in the Age of Brexit

In this special guest feature, Robert Roe from Scientific Computing World interviews Mark Parsons on the strategy for HPC in the UK. “We are not part of EuroHPC, so we are not going to have access to the exascale systems that appear in Europe in 2023, they will also have some very large systems in 2021, around 150 to 200 Pflop systems, and we will not have access to that which will have a detrimental effect on our scientific and industrial communities ability to use the largest scale of supercomputing.”

European Processor Initiative Reaches Important Milestones in First Year

The European Processor Initiative (EPI) has announced the completion of important milestones in its first year. “The first-generation chip family, named Rhea, will include Arm ZEUS architecture general purpose cores and prototypes of high energy-efficient accelerator tiles: RISC-V based (EPAC), Multi-Purpose Processing Array (MPPA), embedded FPGA (eFPGA) and cryptography HW engine. First Rhea chips will be fabricated in N6 technology aiming at the highest processing capabilities and energy efficiency.”

New Cray ClusterStor E1000 to Power Exascale Workloads

Today Cray unveiled its Cray ClusterStor E1000 system, an entirely new parallel storage platform for the Exascale Era. “As the external high performance storage system for the first three U.S. exascale systems, Cray ClusterStor E1000 will total over 1.3 exabytes of storage for all three systems combined. ClusterStor E1000 systems can deliver up to 1.6 terabytes per second and up to 50 million I/O operations per second per rack – more than double compared to other parallel storage systems in the market today.”

HPC Framework Blocks to Ease Programming of Exascale Supercomputers

Researchers are beginning a three-year cross-institute project that aims to lower the barrier to entry for software engineers developing new high-performance applications on large scale parallel systems. “The team of researchers plan to combine user insights, new compiler optimizations, and advanced runtime support to create the PAbB framework which will ultimately create building blocks of parallel code for heterogeneous environments to use across a number of applications from computational science and data science.”