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Powering Datacenters with Earth’s Molten Core: A Practical Guide

Dan Olds from gave this talk at the UK HPC Conference. “Novel Therm’s enhanced Stirling Engine can turn warm water geothermal into megawatts of electricity. This 100% green solution provides a very low PUE (1.03-1.05) and significantly lower costs than alternative co-location, IaaS solutions. This session will look at the technical side of warm-water geothermal energy and how this innovative company will be using it to power data centers.”

Video: Arm as a Viable Architecture for HPC & AI

Dr. Oliver Perks from Arm gave this talk at the UK HPC Conference. “The ARM architecture has grown in availability and usability for the HPC community in just the past few years. This is demonstrated by several ARM-based projects around the world, including the Japanese Post-K, European Mont-Blanc, U.S. DOE/NNSA Vanguard, the UK’s GW4/EPSRC efforts. Furthermore, the commercial availability of ARM nodes from HPC vendors such as Cray, Gigabyte, HPE, and Ingrasys also demonstrate the viability of ARM architectures.”

LANL teams with Arm for Extreme-scale Computing

Los Alamos National Laboratory and Arm are teaming up to make efficient, workload-optimized processors tailored to the extreme-scale computing requirements of the Laboratory’s national-security mission. The collaboration addresses the challenges of connecting more and more processors as high performance computers become larger and more powerful. “This close collaboration with EMC3, is expected to start bearing performance results in near term systems as well some of our future systems in design,” said Gary Grider, division leader for HPC at Los Alamos National Laboratory.

An Update on ARM in HPC

Brent Gorda from Arm gave this talk at the Linaro Connect conference. “Arm-based systems are showing up in the HPC community and new silicon is coming. The architecture has also been selected for several of the exascale projects worldwide. Brent will talk about the aspects of Arm that are attractive to the HPC community, updates on projects and what we as a community can do to help accelerate adoption in this space.”

ExaNeSt Project Successfully Builds Prototype for Exascale

In this video, researchers describe the results from the ExaNeSt project. “The prototype is now successfully built, demonstrating energy efficiency in a High-Performance Computing (HPC) testbed: the energy consumed for solving a given problem on this new platform is 3 to 10 times lower than what traditional HPC processors of the same time generation consume for solving the same problem. The substantial prototype has been validated through the execution of full HPC applications from materials science, climate forecasting, computational fluid dynamics, astrophysics, neuroscience, and a database.”

Tachyum Joins CXL High-Speed Interconnect Consortium

Today Tachyum announced it has joined the Compute Express Link (CXL) Consortium, a group of companies dedicated to advancing a new, open-industry standard interconnect designed to address the increasing demands of high-performance computational workloads. “With worldwide data center capacity doubling every five years, and with AI, Machine Learning, and High-Performance Computing rapidly migrating from purpose-built systems to the cloud, the importance of a fast industry-standard interconnect, which supports memory coherency, cannot be overstated.”

A Performance Comparison of Different MPI Implementations on an ARM HPC System

Nicholas Brown from EPCC gave this talk at the MVAPICH User Group. “In this talk I will describe work we have done in exploring the performance properties of MVAPICH, OpenMPI and MPT on one of these systems, Fulhame, which is an HPE Apollo 70-based system with 64 nodes of Cavium ThunderX2 ARM processors and Mellanox InfiniBand interconnect. In order to take advantage of these systems most effectively, it is very important to understand the performance that different MPI implementations can provide and any further opportunities to optimize these.”

How the European Processor Initiative is Leveraging RISC-V for the Future of Supercomputing

In this special guest feature, Calista Redmond writes that the European Processor Initiative is designing an HPC accelerator based on RISC-V. “The accelerator will be designed for high throughput and power efficiency within the general purpose processor (GPP) chip. The EPI explains that using RISC-V enables the program to leverage “open source resources at [the] hardware architecture level and software level, as well as ensuring independence from non-European patented computing technologies.”

Silicon Catalyst Announces Three Newly Admitted Startups to Semiconductor Incubator

Today the Silicon Catalyst announced the admission of three early-stage companies into the semiconductor industry’s highly acclaimed incubation program. “It’s with great pleasure that we welcome these three, exciting early-stage companies into our incubator, as they are developing leading edge solutions spanning the edge computing, artificial intelligence and power management segments. Their innovative products are poised to significantly improve overall performance and cost-effectiveness across many industries and applications.”

Video: Arm HPC Update from ISC 2019

In this video, Brent Gorda provides an update on the progress on Arm HPC from the ISC 2019 conference in Frankfurt. “From the perspective of Arm in HPC, it was an excellent event with several high-profile announcements that caught everyone’s attention. The Arm ecosystem was well represented with our partners visible on the show floor and around town.”