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Arm HPC User Group Returns to Denver Nov. 18

The Arm HPC team invites you to our 5th Annual Arm HPC User Group (AHUG) session at SC19. The all-day event takes place on Monday, Nov. 18 at the Curtis Hotel in Denver. “We have a full day agenda of strategic partners and end-users from all regions of the world sharing their experiences, best practices, plans, ecosystem advances, and results on Arm-based platforms for HPC applications. The goal of this event is, as always, to candidly share and network among the growing number of users and sites that are deploying Arm for HPC and to highlight the work of the many leaders in this area.”

HPC Framework Blocks to Ease Programming of Exascale Supercomputers

Researchers are beginning a three-year cross-institute project that aims to lower the barrier to entry for software engineers developing new high-performance applications on large scale parallel systems. “The team of researchers plan to combine user insights, new compiler optimizations, and advanced runtime support to create the PAbB framework which will ultimately create building blocks of parallel code for heterogeneous environments to use across a number of applications from computational science and data science.”

Codeplay SYCL 1.2.1 Solution offers an Open Alternative to CUDA

Today Codeplay announced the world’s first fully-conformant SYCL 1.2.1 Solution. “As a non-proprietary alternative to the incumbent CUDA, SYCL is an open standard developed by the Khronos Group that enables developers to write code for heterogeneous systems using standard C++. Developers are looking at how they can accelerate their applications without having to write optimized processor specific code. SYCL is the industry standard for C++ acceleration, giving developers a platform to write high-performance code in standard C++, unlocking the performance of accelerators and specialized processors from companies such as AMD, Intel, Renesas and Arm.”

Vitis Unified Software Platform to make FPGA Programming Accessible for All Developers

Since their beginnings, FPGA’s have been notorious for being hard to program. That could be changing with the new Vitis Unified Software Platform from Xilinx.n“Xilinx has created a singular environment that enables programmers and engineers from all disciplines to co-develop and optimize both their hardware and software, using the tools and frameworks they already know and understand. This means that they can adapt their hardware architecture to their application without the need for new silicon.”

Appentra announces Early Access Program for Parallelware Analyzer

Today Appentra announced the company is offering developers the opportunity to join the Early Access Program for Parallelware Analyzer. “While Appentra’s Parallelware Trainer provides an interactive learning environment where users can learn how to parallelize, Parallelware Analyzer provides the appropriate tools for the key stages of the parallel development workflow, aiding developers with code analysis that would otherwise be error-prone, time-consuming and completed manually.”

7 Ways HPC Software Developers Can Benefit from Intel Software Investments

Intel has long focused on supporting HPC software. But, as the years have gone by, much has changed — and the company’s offerings have grown and evolved. A chapter from a recent edition of Parallel Universe Magazine, from this past July outlines this evolution and offers seven ways HPC software developers can benefit from Intel software investments. 

Video: Managing HPC Software Complexity with Spack

Greg Becker from LLNL gave this talk at the MVAPICH User Group. “Spack is an open-source package manager for HPC. This presentation will give an overview of Spack, including recent developments and a number of items on the near-term roadmap. We will focus on Spack features relevant to the MVAPICH community; these include Spack’s virtual package abstraction, which is used for API-compatible libraries including MPI implementations, package level compiler wrappers, and packages which modify other package’s build environments.”

Appentra Releases Parallelware Trainer 1.3

Appentra has released Parallelware Trainer 1.3, an interactive, real-time code editor with features that facilitate the learning, usage, and implementation of parallel programming by understanding how and why sections of code can be parallelized. “We’re happy to announce the release of Parallelware Trainer 1.3 which now supports the detection of defects and recommendations for concurrency and parallelism. We expect this new feature to further improve the learning process by providing feedback about code issues right in the integrated editor.”

Singularity Desktop Beta comes to macOS

Today Sylabs announced Beta 1 release of Singularity Desktop for macOS, which allows Linux containers to be designed, built, tested, and signed/verified on macOS. Designed to meet the needs of High Performance Computing, Singularity provides a single universal on-ramp from developers’ workstations to local resources, the cloud, and all the way to edge. “At the inaugural meeting of the Singularity User Group (SUG) this past March at SDSC in San Diego, we officially embarked upon an important journey — a journey whose outcome is to ultimately transform that ‘attractive spectator’ (a.k.a. your macOS laptop or desktop) into a bona fide platform for computing. The transformation is being realized through the introduction of Singularity Desktop — software that allows users to design, build, test, and sign/verify Linux-based Singularity containers on macOS. Thus the purpose of this post is to hereby announce the next milestone in this important journey: availability of the first beta release of Singularity Desktop.”

Job of the Week: Software Engineer for Scientific and Math Libraries at Cray

Cray in Minnesota is seeking a Software Engineer for Scientific and Math Libraries in our Job of the Week. “The Cray Scientific and Math Libraries group has an opening for a motivated and skilled low-level software engineer to design and develop state of the art numerical libraries for Cray’s current and future supercomputers. The group develops high-performance linear algebra and Fourier transform libraries for Cray systems.”