A €240 million project has been launched to promote HPC and AI autonomy in Europe. The Digital Autonomy with RISC-V in Europe, Special Agreement 1 (DARE SGA1) project marks “a significant milestone in Europe’s ….
Axelera AI Wins EuroHPC Grant of up to €61.6M for AI Chiplet Development
March 6, 2025 by
AI hardware maker Axelera AI has unveiled Titania, which the company described as a high-performance, low-power and scalable AI inference chiplet. Part of the EuroHPC JU’s effort to develop a supercomputing ….
@HPCpodcast: Former AWS VP Adrian Cockcroft Talks HPC-AI Trends Coming out of 2024’s End-of-Year Conferences
January 8, 2025 by
With the new year upon us, this is a good time to review what we learned at conferences held toward the end of last year. In this episode, sponsored by Lenovo, Adrian Cockcroft joins Shahin and Doug to discuss SC24, the RISC-V Summit and AWS Reinvent. Adrian, who ….
Tenstorrent and LG Electronics Expand Chip Partnership
November 13, 2024 by
SEOUL, Nov. 12, 2024 — LG Electronics (LG) and Tenstorrent announces an expanded collaboration that builds on their initial chiplet project to develop System-on-Chips (SoCs) and systems for the global market. Through this partnership, LG aims to enhance its design and development capabilities for AI chips tailored to its products and services, aligning with its […]
MIPS Releases AI-Enabled RISC-V Automotive CPU for ADAS and Autonomous Vehicles
November 7, 2024 by
SAN JOSE – November 7, 2024 – MIPS, a developer of IP compute cores, announced today the general availability(GA) launch of the MIPS P8700 Series RISC-V Processor. Designed to meet the data movement demands of advanced automotive applications, such as ADAS and Autonomous Vehicles (AVs), the P8700 delivers industry-leading accelerated compute, power efficiency and scalability […]
Codasip Donates CHERI RISC-V SDK to CHERI Alliance
October 24, 2024 by
Munich, October, 2024 – RISC-V company Codasip announced it has donated its Software Development Kit (SDK) for CHERI to the community-interest organization CHERI Alliance, which makes the SDK freely available for download on GitHub. CHERI (Capability Hardware Enhanced RISC Instructions) is an advanced security technology developed by the University of Cambridge in a joint research […]
HPC News Bytes 20240401: A $100B AI Data Center, Eviden Says It’s Healthy, Alibaba’s RISC-V Chip, New Optical Interconnect Group, Nvidia Fights CUDA Translation
April 1, 2024 by
Happy April Fool’s Day! It was as always an interesting week in the world of HPC-AI, this edition of HPC News Bytes includes commentary on: Microsoft and….
Achronix FPGAs Add Support for Bluespec’s RISC-V Chips
March 26, 2024 by
March 26, 2024, SANTA CLARA, Calif. & FRAMINGHAM, Mass.– FPGA technology company Achronix Semiconductor Corporation and Bluespec, Inc., a RISC-V tools and silicon IP company, today announced a family of Linux-capable RISC-V soft processors that are available for the Achronix Speedster7t FPGA family. Marking an industry first, Bluespec’s RISC-V processors now integrate into the Achronix 2D […]
SiFive Announces RISC-V Products for GenAI and ML
October 12, 2023 by
Santa Clara, Calif., Oct. 11, 2023 –- RISC-V computing company SiFive, Inc. today announced two products designed to address new requirements for high performance compute. The SiFive Performance P870 and SiFive Intelligence X390 offer a new level of low power, compute density, and vector compute capability, and when combined provide the necessary performance boost for […]
@HPCpodcast: An Architecture Update from RISC-V International CTO Mark Himelstein
July 6, 2023 by
Mark Himelstein, chief technology officer at RISC-V International, joins us to discuss the latest developments with the RISC-V instruction set architecture and its growing community and footprint. Topics include: HPC use cases from sensors to supercomputer, achieving customization without loss of compatibility, AI and its impact on chips and systems, and the question on everyone’s mind: when will we see RISC-V in servers and supercomputers? Himelstein also looks at RISC-V’s design wins, including EuroHPC’s backing of R&D to develop HPC hardware and software based on RISC-V. You may also be interested in Shahin’s conversation with Mark in August 2020 to hear how things have evolved since then.
