In this Q&A, SDSC Chief Data Science Officer Ilkay Altintas explains the rationale for composable systems and the approach taken with the new Expanse supercomputer. With its new Expanse supercomputer, San Diego Supercomputer Center (SDSC) is pioneering composable HPC systems to enable the dynamic allocation of resources tailored to individual workloads. One of the critical innovations in the SDSC’s new Expanse supercomputer from Dell Technologies, is the ability to support composable systems with dynamic capabilities.
Brightskies Deploys Open Source RTM Application for Easy Optimization across Multiple Architectures
August 19, 2020 by Leave a Comment
In this sponsored post on behalf of Intel, we see that in today’s high-performance computing applications, many different pieces of hardware can perform data-centric functions. With diverse accelerators entering the market, programming for multiple architectures has created significant development barriers for software developers.
Paradigm Change: Reinventing HPC Architectures with In-Package Optical I/O
In this white paper, our friends over at Ayar Labs discuss an important paradigm change: reinventing HPC architectures with in-package optical I/O. The introduction of in-package optical I/O technology helps HPC centers accelerate the slope of compute progress needed to tackle ever-growing scientific problem sizes and HPC/AI convergence. Ayar Labs expects to not only see its technology extend the traditional type of architecture to put the HPC industry back on track, but also result in an inflection point that fundamentally changes the slope of the compute performance efficiency curve. The key will be enabling converged HPC/AI centers to build systems with disaggregated CPUs, GPUs, FPGAs and custom ASICs interconnected on equal footing.
Xilinx Names Hasmukh Ranjan Chief Information Officer
July 1, 2020 by
Xilinx has announced that Hasmukh Ranjan has joined the company as chief information officer. As CIO, Hasmukh will lead Xilinx’s information technology group and drive internal IT strategy, systems and processes in support of Xilinx’s mission to “build the adaptable, intelligent world.” Hasmukh joins Xilinx from Synopsys, where he served as the company’s CIO and […]
New, Open DPC++ Extensions Complement SYCL and C++
June 30, 2020 by
In this guest article, our friends at Intel discuss how accelerated computing has diversified over the past several years given advances in CPU, GPU, FPGA, and AI technologies. This innovation drives the need for an open and cross-platform language that allows developers to realize the potential of new hardware, minimizes development cost and complexity, and maximizes reuse of their software investments.
From Forty Days to Sixty-five Minutes without Blowing Your Budget Thanks to Gigaio Fabrex
May 28, 2020 by
In this sponsored post, Alan Benjamin, President and CEO of GigaIO, discusses how the ability to attach a group of resources to one server, run the job(s), and reallocate the same resources to other servers is the obvious solution to a growing problem: the incredible rate of change of AI and HPC applications is accelerating, triggering the need for ever faster GPUs and FPGAs to take advantage of the new software updates and new applications being developed.
Rugged COTS Platform Takes On Fast-Changing Needs of Self-Driving Trucks
This white paper by Advantech, “Rugged COTS Platform Takes On Fast-Changing Needs of Self-Driving Trucks” discusses how the fast-changing needs of self-driving trucks are forcing compute platforms to evolve. Advantech and Crystal Group are teaming up to power that evolution based on AV trends, compute requirements, and a rugged COTS philosophy converging for breakthrough innovation in self-driving truck designs.
Stepping up Efficiency for Exascale with FPGAs at the LEGaTO Project
March 3, 2020 by
In this special guest feature from Scientific Computing World, Robert Roe writes that European researchers have developed a framework to boost the energy efficiency of CPU, GPU and FPGA resources. “Legato (Low Energy Toolset for Heterogeneous Computing) is one such project with the lofty aims of developing a programming framework to support heterogeneous systems of CPU, GPU and FPGA resources that can offload specific tasks to different acceleration technologies through its own runtime system.”
2020 Predictions from Radio Free HPC
January 16, 2020 by
In this podcast, the Radio Free HPC team lays out their tech predictions for 2020. “Henry predicts that we’ll see a RISC-V based supercomputer on the TOP500 list by the end of 2020 – gutsy call on that. This is a double down on a bet that Dan and Henry have, so he’s reinforcing his position. Dan also sees 2020 as the “Year of the FPGA.”
New Achronix Bittware FPGA Accelerator Speeds Cloud, AI, and Machine Learning
January 9, 2020 by
In October Bittware and Achronix announced a strategic collaboration with Achronix to introduce the S7t-VG6 PCIe accelerator product – a PCIe card sporting the new Achronix 7nm Speedster7t FPGA. This new generation of accelerator products offers a range of capabilities including low-cost and highly flexible GDDR6 memory that aims to offer HBM-class memory bandwidth, high-performance machine learning processors and a new 2D network-on-chip for high bandwidth and energy-efficient data movement.
