Xilinx has announced that Hasmukh Ranjan has joined the company as chief information officer. As CIO, Hasmukh will lead Xilinx’s information technology group and drive internal IT strategy, systems and processes in support of Xilinx’s mission to “build the adaptable, intelligent world.” Hasmukh joins Xilinx from Synopsys, where he served as the company’s CIO and […]
New, Open DPC++ Extensions Complement SYCL and C++
June 30, 2020 by Leave a Comment
In this guest article, our friends at Intel discuss how accelerated computing has diversified over the past several years given advances in CPU, GPU, FPGA, and AI technologies. This innovation drives the need for an open and cross-platform language that allows developers to realize the potential of new hardware, minimizes development cost and complexity, and maximizes reuse of their software investments.
From Forty Days to Sixty-five Minutes without Blowing Your Budget Thanks to Gigaio Fabrex
May 28, 2020 by Leave a Comment
In this sponsored post, Alan Benjamin, President and CEO of GigaIO, discusses how the ability to attach a group of resources to one server, run the job(s), and reallocate the same resources to other servers is the obvious solution to a growing problem: the incredible rate of change of AI and HPC applications is accelerating, triggering the need for ever faster GPUs and FPGAs to take advantage of the new software updates and new applications being developed.
Rugged COTS Platform Takes On Fast-Changing Needs of Self-Driving Trucks
This white paper by Advantech, “Rugged COTS Platform Takes On Fast-Changing Needs of Self-Driving Trucks” discusses how the fast-changing needs of self-driving trucks are forcing compute platforms to evolve. Advantech and Crystal Group are teaming up to power that evolution based on AV trends, compute requirements, and a rugged COTS philosophy converging for breakthrough innovation in self-driving truck designs.
Stepping up Efficiency for Exascale with FPGAs at the LEGaTO Project
March 3, 2020 by
In this special guest feature from Scientific Computing World, Robert Roe writes that European researchers have developed a framework to boost the energy efficiency of CPU, GPU and FPGA resources. “Legato (Low Energy Toolset for Heterogeneous Computing) is one such project with the lofty aims of developing a programming framework to support heterogeneous systems of CPU, GPU and FPGA resources that can offload specific tasks to different acceleration technologies through its own runtime system.”
2020 Predictions from Radio Free HPC
January 16, 2020 by
In this podcast, the Radio Free HPC team lays out their tech predictions for 2020. “Henry predicts that we’ll see a RISC-V based supercomputer on the TOP500 list by the end of 2020 – gutsy call on that. This is a double down on a bet that Dan and Henry have, so he’s reinforcing his position. Dan also sees 2020 as the “Year of the FPGA.”
New Achronix Bittware FPGA Accelerator Speeds Cloud, AI, and Machine Learning
January 9, 2020 by
In October Bittware and Achronix announced a strategic collaboration with Achronix to introduce the S7t-VG6 PCIe accelerator product – a PCIe card sporting the new Achronix 7nm Speedster7t FPGA. This new generation of accelerator products offers a range of capabilities including low-cost and highly flexible GDDR6 memory that aims to offer HBM-class memory bandwidth, high-performance machine learning processors and a new 2D network-on-chip for high bandwidth and energy-efficient data movement.
European Processor Initiative Reaches Important Milestones in First Year
November 4, 2019 by
The European Processor Initiative (EPI) has announced the completion of important milestones in its first year. “The first-generation chip family, named Rhea, will include Arm ZEUS architecture general purpose cores and prototypes of high energy-efficient accelerator tiles: RISC-V based (EPAC), Multi-Purpose Processing Array (MPPA), embedded FPGA (eFPGA) and cryptography HW engine. First Rhea chips will be fabricated in N6 technology aiming at the highest processing capabilities and energy efficiency.”
Intel Ships First 10nm Agilex FPGAs with Integrated Arm Processors
August 30, 2019 by
Today Intel announced that it has begun shipments of the first Intel Agilex field programmable gate arrays (FPGAs) to early access program customers. In what may be a surprise to many, the F-Series variant of the chip family also provides the option to integrate a quad-core Arm Cortex-A53 processor to provide high system integration. “Intel FPGAs have provided Microsoft tremendous value for accelerating real-time AI, networking, and other applications/infrastructure across Azure Cloud Services, Bing, and other data center services.”
Video: Xilinx Unveils World’s Largest FPGA
August 21, 2019 by
Today Xilinx announced the expansion of its 16 nanometer (nm) Virtex UltraScale+ family to now include the world’s largest FPGA — the Virtex UltraScale+ VU19P. With 35 billion transistors, the VU19P provides the highest logic density and I/O count on a single device ever built, enabling emulation and prototyping of tomorrow’s most advanced ASIC and SoC technologies, as well as test, measurement, compute, networking, aerospace and defense-related applications.
