In this sponsored article, Bruce Moxon, Sr. HPC Architect, Microsoft Azure Global, discusses a number of developments that are ushering in a new era of HPC with the speed and agility of the Cloud. A well-planned, cloud-native HPC strategy complements traditional on-premises HPC investments. It leverages a DevOps model to improve access to the right infrastructure at the right time in the development cycle, to opportunistically incorporate rapid technology advances, and to accelerate innovation and improve time-to-results.
DARPA Announces FPGA-to-ASICs Program with Intel to Expand US-based Chip Making for Defense
March 18, 2021 by
March 18, 2021 — DARPA (Defense Advanced Research Projects Agency) today announced the Structured Array Hardware for Automatically Realized Applications (SAHARA) program, which aims to expand access to domestic manufacturing capabilities to tackle challenges hampering the secure development of custom chips for defense systems. Working in partnership with Intel and academic researchers from University of […]
Achronix Ships 10 Millionth Speedcore eFPGA IP Core
March 17, 2021 by
Santa Clara, CA – Achronix announces today that 10 million Speedcore eFPGA IP cores have shipped in customers’ ASICs. Achronix said it is the only high-performance FPGA supplier to offer both high-performance standalone FPGAs and eFPGA IP. Speedcore eFPGA IP is optimized for applications in 5G wireless infrastructure, networking, computational storage and automotive driver assistance […]
FPGA Maker Achronix to List on Nasdaq Through Merger With ACE Convergence
January 7, 2021 by
Jan. 7, 2021, Santa Clara, CA – Achronix Semiconductor Corporation, maker of high-performance field-programmable gate arrays (FPGAs) and embedded FPGA (eFPGA) IP, and ACE Convergence Acquisition Corp. (ACE) (Nasdaq: ACEV), a special-purpose acquisition company, today announced that they have entered into a definitive agreement for a business combination that would result in the combined entity […]
At SC20: BittWare Launches IA-840F with Intel Agilex FPGA and Support for oneAPI
November 17, 2020 by
Concord, NH – Nov. 17, 2020 – Bittware today unveiled the IA-840F, the company’s Intel Agilex-based FPGA card designed to deliver performance-per-watt improvements for data center, networking and edge compute workloads. Agilex FPGAs deliver up to 40 percent higher performance or up to 40 percent lower power, depending on application requirements, according to Intel. BittWare […]
Composable Supercomputing Optimizes Hardware for AI-driven Data Calculation
October 1, 2020 by
In this sponsored post, our friend John Spiers, Chief Strategy Officer at Liqid, discusses how composable disaggregated infrastructure (CDI) solutions are emerging as a solution to roadblocks to advancing the mission of high-performance computing. CDI orchestration software dynamically composes GPUs, NVMe SSDs, FPGA, networking, and storage-class memory to create software-defined bare metal servers on demand. This enables unparalleled resource utilization to deliver previously impossible performance for AI-driven data analytics.
Composable Computing at SDSC
August 26, 2020 by
In this Q&A, SDSC Chief Data Science Officer Ilkay Altintas explains the rationale for composable systems and the approach taken with the new Expanse supercomputer. With its new Expanse supercomputer, San Diego Supercomputer Center (SDSC) is pioneering composable HPC systems to enable the dynamic allocation of resources tailored to individual workloads. One of the critical innovations in the SDSC’s new Expanse supercomputer from Dell Technologies, is the ability to support composable systems with dynamic capabilities.
Brightskies Deploys Open Source RTM Application for Easy Optimization across Multiple Architectures
August 19, 2020 by
In this sponsored post on behalf of Intel, we see that in today’s high-performance computing applications, many different pieces of hardware can perform data-centric functions. With diverse accelerators entering the market, programming for multiple architectures has created significant development barriers for software developers.
Paradigm Change: Reinventing HPC Architectures with In-Package Optical I/O
In this white paper, our friends over at Ayar Labs discuss an important paradigm change: reinventing HPC architectures with in-package optical I/O. The introduction of in-package optical I/O technology helps HPC centers accelerate the slope of compute progress needed to tackle ever-growing scientific problem sizes and HPC/AI convergence. Ayar Labs expects to not only see its technology extend the traditional type of architecture to put the HPC industry back on track, but also result in an inflection point that fundamentally changes the slope of the compute performance efficiency curve. The key will be enabling converged HPC/AI centers to build systems with disaggregated CPUs, GPUs, FPGAs and custom ASICs interconnected on equal footing.
Xilinx Names Hasmukh Ranjan Chief Information Officer
July 1, 2020 by
Xilinx has announced that Hasmukh Ranjan has joined the company as chief information officer. As CIO, Hasmukh will lead Xilinx’s information technology group and drive internal IT strategy, systems and processes in support of Xilinx’s mission to “build the adaptable, intelligent world.” Hasmukh joins Xilinx from Synopsys, where he served as the company’s CIO and […]
