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High Speed Data Capture for AI on the Fly Edge Applications

In many AI applications, transporting large amounts of data back to a remote datacenter is impractical and undesirable. With AI on the Fly, the entire AI workflow resides at the edge at the data source. One Stop Systems’s Tim Miller explores how high performance scalable data acquisition is a fundamental and enabling component of this emerging new paradigm. 

Xilinx Launches Alveo U50 FPGA Datacenter Accelerator Card

Today Xilinx launched the new Alveo U50 data center accelerator card, the industry’s first low profile adaptable accelerator with PCIe Gen 4 support. Designed for the datacenter, the Alveo U50 is uniquely designed to supercharge a broad range of critical compute, network and storage workloads, all on one reconfigurable platform. “We believe the combination of low-profile form-factor, HBM2 memory performance, and PCIe Gen 4 speed to interface with IBM Power processors will enable the OpenPOWER ecosystem to provide cutting edge adaptable acceleration solutions.” 

HPE Speeds Gen10 Servers with Intel FPGA Programmable Acceleration Card D5005

HPE is now shipping HPE ProLiant DL380 Gen10 servers with the new Intel FPGA Programmable Acceleration Card D5005, the latest in a growing line of field programmable gate array-based, server-accelerator cards from Intel. “Compared to the Intel Programmable Acceleration Card with Intel Arria 10 GX FPGA, the Intel FPGA PAC D5005 accelerator card offers significantly more resources including three times the amount of programmable logic, as much as 32 GB of DDR4 memory (a 4x increase) and faster Ethernet ports (two 100GE ports versus one 40GE port).”

John Shalf from LBNL on Computing Challenges Beyond Moore’s Law

In this special guest feature from Scientific Computing World, Robert Roe interviews John Shalf from LBNL on the development of digital computing in the post Moore’s law era. “In his keynote speech at the ISC conference in Frankfurt, Shalf described the lab-wide project at Berkeley and the DOE’s efforts to overcome these challenges through the development acceleration of the design of new computing technologies.”

FPGAs and the Road to Reprogrammable HPC

In this special guest feature from Scientific Computing World, Robert Roe writes that FPGAs provide an early insight into possibile architectural specialization options for HPC and machine learning. “Architectural specialization is one option to continue to improve performance beyond the limits imposed by the slow down in Moore’s Law. Using application-specific hardware to accelerate an application or part of one, allows the use of hardware that can be much more efficient, both in terms of power usage and performance.”

Video: Can FPGAs compete with GPUs?

John Romein from ASTRON gave this talk at the GPU Technology Conference. “We’ll discuss how FPGAs are changing as a result of new technology such as the Open CL high-level programming language, hard floating-point units, and tight integration with CPU cores. Traditionally energy-efficient FPGAs were considered notoriously difficult to program and unsuitable for complex HPC applications. We’ll compare the latest FPGAs to GPUs, examining the architecture, programming models, programming effort, performance, and energy efficiency by considering some real applications.”

Xilinx to Acquire Solarflare

Today Xilinx announced today that it has entered into a definitive agreement to acquire Solarflare Communications. “The acquisition will enable Xilinx to combine its industry-leading FPGA, MPSoC and ACAP solutions with Solarflare’s ultra-low latency network interface card (NIC) technology and Onload application acceleration software, to enable new converged SmartNIC solutions, accelerating Xilinx’s “data center first” strategy and transition to a platform company.”

Video: Enabling Applications to Exploit SmartNICs and FPGAs

Sean Hefty and Venkata Krishnan from Intel gave this talk at the OpenFabrics Workshop in Austin. “Advances in Smart NIC/FPGA with integrated network interface allow acceleration of application-specific computation to be performed alongside communication. Participants will learn about the potential for Smart NIC/FPGA application acceleration and will have the opportunity to contribute application expertise and domain knowledge to a discussion of how Smart NIC/FPGA acceleration technology can bring individual applications into the Exascale era.”

Podcast: Multicore Scaling Slow Down, and Fooling AI

In this podcast, the Radio Free HPC team has an animated discussion about multicore scaling, how easy it seems to be to mislead AI systems, and some good sized catches of the week. “As CPU performance improvements have slowed down, we’ve seen the semiconductor industry move towards accelerator cards to provide dramatically better results. Nvidia has been a major beneficiary of this shift, but it’s part of the same trend driving research into neural network accelerators, FPGAs, and products like Google’s TPU.”

Optimizing HPC Code with Roofline Analysis

In this special guest feature, James Reinders describes why roofline estimation is a great tool for code optimization in HPC. “As a long-time teacher of optimization techniques, I can confidently say that Roofline analysis is a must-have for anyone optimizing for performance. This has not always been the case. As I will explain, today it is an important technique to draw upon when doing performance optimization.”