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@HPCpodcast: CXL News, the CHIPS Act, Chips and Nm and Chip ‘Sprawl’

We’ve heard so much about the CXL interconnect – including the recent announcement of CXL v3.0 – and components that are CXL-ready, that it may come as a surprise that CXL v1.1 “hosts” are only just now shipping. It’s a technology that could play a central role in the ever-more heterogenous, more memory-intensive systems of the future. And now, after several years of experimentation and various interconnect consortia, CXL is emerging as the standard for advanced functionality for fabric technologies. Along with CXL we also discuss some of the details of the CHIPS and Science Act….

Post-Exascale Fabric: NNSA Awards Cornelis Networks $18M for High Performance Network R&D

Those who gave up for dead Intel’s Omni-Path fabric, which Intel began working on 2012 and stopped supporting seven years later, may want to re-think that. Cornelis Networks, the company breathing life into Omni-Path since 2020, has won an $18 million R&D contract from the U.S. National Nuclear Security Administration (NNSA). The award is part of DOE’s Next-Generation High Performance Computing Network (NG-HPCN) project….

PCI-SIG Releases PCIe 6.0 Specification

BEAVERTON, OR. – January 11, 2022 – PCI-SIG, developer of the PCI Express (PCIe) standard, today announced the official release of the PCIe 6.0 specification, reaching 64 GT/s. PCIe 6.0 specification features: 64 GT/s raw data rate and up to 256 GB/s via x16 configuration Pulse Amplitude Modulation with 4 levels (PAM4) signaling and leverages existing PAM4 available […]

Samsung Announces PCIe 5.0 SSD for Enterprise Servers

SEOUL – Dec. 23, 2021 – Samsung Electronics Co., Ltd. today announced the PM1743 SSD for enterprise servers, integrating the PCIe (Peripheral Component Interconnect Express) 5.0 interface with Samsung’s advanced sixth-generation V-NAND. “For over a decade, Samsung has been delivering SATA, SAS and PCIe-based SSDs that have been recognized for outstanding performance and reliability by leading […]

CXL Consortium at SC21: 1st Public Demo of Compute Express Link

November 15, 2021 – Beaverton, OR – The CXL Consortium, an industry standards body dedicated to advancing Compute Express Link (CXL) technology, will showcase growing momentum for CXL technology at Supercomputing (SC21), taking place at America’s Center in St. Louis, Missouri and virtually November 15-18. The CXL specification enables a high-speed, efficient interconnect between the CPU and […]

Cornelis Networks Talks High Speed Fabrics for Heterogeneous HPC-AI

We caught up with Phil Murphy, CEO of fabrics technology company Cornelis Networks, which has one of the most interesting vendor histories in the HPC community. Extending back to the 1990s and carrying forward extensive interconnect R&D by both Intel and Cray, Cornelis’s OmniPath is a fabric uniquely well-suited to the increasingly heterogeneous world of […]

Amphenol: 112Gb/s Interconnect with eTopus Products for IP Solutions

San Jose, Sept. 14, 2021 – Amphenol ICC, the global leader in connector technology, design and manufacturing, and eTopus Technology, a pioneer of ultra-high-speed ADC/DSP-based SerDes for wireline applications including data center, cloud, edge, and 5G base stations, today announced the development of a 112Gb/s interconnect technology built on their products. This combined solution is […]

Tear Down These Walls: How CXL Could Reinvent the Data Center

The move to heterogenous computing will require shifting some … interconnects to a more performant industry standard interface enabling new capabilities like memory tiers, pooled memory, and even the convergence of memory and storage. And to unshackle architectural innovation and choice, we need an open standard with broad industry acceptance. Enter the Compute Express Link (CXL). CXL is an open interface that standardizes a high-performance interconnect for data-centric platforms – it provides the ability to connect CPUs to XPUs, storage, memory and networking, enabling increased degrees of freedom for platform architecture via the ability to build more optimized infrastructures.

Ayar Labs Demos Terabit Optical Link for Co-Packaged Optics and Chip-to-Chip Connectivity

SANTA CLARA, Calif. — Ayar Labs announced today that it has successfully demonstrated what is said is the industry’s first terabit per second Wavelength Division Multiplexing (WDM) optical link with its TeraPHY optical I/O chiplet and SuperNova multi-wavelength optical source. The demonstration shows a fully functional TeraPHY chiplet with 8 optical ports running error free […]

Molex Scales Deployments of High-Speed Interconnect for Hyperscale and Data Centers

LISLE, IL – April 29, 2021 – Molex, a leading global connectivity and electronics solutions provider, is scaling global deployments of its high-speed copper and optical interconnects and modules to help customers better address demands for higher bandwidth. Molex’s broad portfolio of next-generation connectivity solutions leverage the latest advancements in copper and optics to deliver high signal integrity, lower […]