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GigaIO Steps Up with PCIe Gen 4 Interconnect for HPC

In this video from ISC 2019, Marc Lehrer from GigaIO describes the company’s innovative HPC interconnect technology based on PCIe Gen 4. “For your most demanding workloads, you want time to solution. The GigaIO hyper-performance network breaks the constraints of old architectures, opening up new configuration possibilities that radically reduces system cost and protect your investment by enabling you to easily adopt new compute or business processes.”

Gen-Z Consortium Announces the Public Release of Its Core Specification 1.0

Today the Gen-Z Consortium released the Gen-Z Core Specification 1.0 on its website. As an open systems interconnect, Gen-Z is designed to provide memory semantic access to data and devices via direct-attached, switched or fabric topologies. “The release of core specification 1.0 today is a significant step towards realization of new architectures and evolution of existing technologies to expand into new roles. Samsung is excited to be a member of the Gen-Z Consortium and is committed towards industry open standards.”

Video: Slim Fly – A Cost Effective Low-Diameter Network Topology

“We introduce a high-performance cost-effective network topology called Slim Fly that approaches the theoretically optimal network diameter. Slim Fly is based on graphs that approximate the solution to the degree-diameter problem. We analyze Slim Fly and compare it to both traditional and state-of-the-art networks. Our analysis shows that Slim Fly has significant advantages over other topologies in latency, bandwidth, resiliency, cost, and power consumption.”