We’ve heard so much about the CXL interconnect – including the recent announcement of CXL v3.0 – and components that are CXL-ready, that it may come as a surprise that CXL v1.1 “hosts” are only just now shipping. It’s a technology that could play a central role in the ever-more heterogenous, more memory-intensive systems of the future. And now, after several years of experimentation and various interconnect consortia, CXL is emerging as the standard for advanced functionality for fabric technologies. Along with CXL we also discuss some of the details of the CHIPS and Science Act….
@HPCpodcast: CXL News, the CHIPS Act, Chips and Nm and Chip ‘Sprawl’
August 19, 2022 by Leave a Comment
PNNL and Micron Partner to Push Memory Boundaries for HPC and AI
March 8, 2022 by
Researchers at Pacific Northwest National Laboratory (PNNL) and Micron are are developing an advanced memory system to support AI for scientific computing. The work is designed to address AI’s insatiable demand for live data — to push the boundaries of memory-bound AI applications — by connecting memory across processors in a technology strategy utilizing the […]
CXL Consortium at SC21: 1st Public Demo of Compute Express Link
November 15, 2021 by
November 15, 2021 – Beaverton, OR – The CXL Consortium, an industry standards body dedicated to advancing Compute Express Link (CXL) technology, will showcase growing momentum for CXL technology at Supercomputing (SC21), taking place at America’s Center in St. Louis, Missouri and virtually November 15-18. The CXL specification enables a high-speed, efficient interconnect between the CPU and […]
Tear Down These Walls: How CXL Could Reinvent the Data Center
June 12, 2021 by
The move to heterogenous computing will require shifting some … interconnects to a more performant industry standard interface enabling new capabilities like memory tiers, pooled memory, and even the convergence of memory and storage. And to unshackle architectural innovation and choice, we need an open standard with broad industry acceptance. Enter the Compute Express Link (CXL). CXL is an open interface that standardizes a high-performance interconnect for data-centric platforms – it provides the ability to connect CPUs to XPUs, storage, memory and networking, enabling increased degrees of freedom for platform architecture via the ability to build more optimized infrastructures.
CXL Consortium Releases Compute Express Link 2.0 Spec
November 12, 2020 by
The CXL Consortium has announced the release of the Compute Express Link 2.0 specification, which adds support for switching for fan-out to connect to more devices; memory pooling for increased memory utilization efficiency and providing memory capacity on demand; and support for persistent memory – while preserving industry investments by supporting full backwards compatibility with […]
