Silicon photonics has the potential to transform HPC: it’s a dual-threat interconnect technology that could – if and when it is wrestled into commercial, cost-effective form – move data within chips and systems much faster than conventional, copper-based interconnects while also delivering far greater energy efficiency. Venture-backed start-ups and established tech companies (HPC, NVIDIA, AMD and Intel, to name four) have mounted significant R&D efforts. In this episode of the @HPCpodcast, Shahin and Doug spoke with a leading silicon photonics expert, Keren Bergmen, Columbia University’s Charles Batchelor Professor of Electrical Engineering, Faculty Director of the Columbia Nano Initiative, and Principal Investigator of the university’s Lightwave Research Laboratory. Prof. Bergman is the recipient of the 2016 IEEE Photonics Engineering Award and is a Fellow of Optica (Optical Society of America) and of IEEE. We cover a range of topics, including: silicon photonics vs. fiber optics used in telecommunications, the use of photo….
@HPCpodcast: Silicon Photonics – Columbia Prof. Keren Bergman on the Why, How and When of a Technology that Could Transform HPC
Silicon Photonics and the Hunt for an HPC Bandwidth Bottleneck Breakthrough
[SPONSORED CONTENT] “FLOPS are cheap, moving data is expensive.” In HPC circles this sentiment is heard often. There’s a growing sense that classical HPC systems and the advanced chips that power them are pushing up against their practical limits, that some foundational new technology is needed to build more balanced systems to achieve the next […]
Optical I/O Company Ayar Labs Raises $130M in Series C Funding
SANTA CLARA, Calif. – April 26, 2022 – Ayar Labs, a chip-to-chip optical connectivity company, today announced that the company has secured $130 million in additional financing led by Boardman Bay Capital Management to drive the commercialization of its breakthrough optical I/O solution. Hewlett Packard Enterprise (HPE) and NVIDIA entered this investment round, joining existing […]
Composable HPC-AI at Scale: The Emergence of Optical I/O Chiplets
The allure of “technology resource disaggregation” – a.k.a., composable computing – doesn’t get old. It’s an ingenious yet common-sense strategy for addressing our increasingly heterogeneous HPC-AI world where no single system can cost-effectively satisfy the range of workloads needed to be kept in play, each workload having its own unique combination of system requirements that would otherwise produce, in a single system, “marooned” resources that sap budgets. Put another way, with a composable HPC infrastructure there are pools of compute, memory, and storage resources enabling the dynamic assembly of customized nodes on a per-workload basis, offering configuration of “Goldilocks” solutions.
