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Abstractions and Directives for Adapting Wavefront Algorithms to Future Architectures

Robert Searles from the University of Delaware gave this talk at PASC18. “Architectures are rapidly evolving, and exascale machines are expected to offer billion-way concurrency. We need to rethink algorithms, languages and programming models among other components in order to migrate large scale applications and explore parallelism on these machines. Although directive-based programming models allow programmers to worry less about programming and more about science, expressing complex parallel patterns in these models can be a daunting task especially when the goal is to match the performance that the hardware platforms can offer.”

IO500 List Showcases World’s Fastest Storage Systems for HPC

In this video from ISC 2018, John Bent and Jay Lofstead describe how the IO500 benchmark measures storage performance in HPC environments. “The IO500 benchmark suite is designed to be easy to run and the community has multiple active support channels to help with any questions. The list is about much more than just the raw rank; all submissions help the community by collecting and publishing a wider corpus of data.”

How DMTF and Redfish Ease System Administration

In this video from the Dell EMC HPC Community meeting, Alan Sill from Texas Tech University describes how DMTF and the Redfish project will ease system administration for HPC clusters. “DMTF’s Redfish is a standard API designed to deliver simple and secure management for converged, hybrid IT and the Software Defined Data Center (SDDC). An open industry standard specification and schema, Redfish specifies a RESTful interface and utilizes defined JSON payloads – usable by existing client applications and browser-based GUI.”

Massive-Scale Analytics Applied to Real-World Problems

David Bader from Georgia Tech gave this talk at PASC18. “Emerging real-world graph problems include: detecting and preventing disease in human populations; revealing community structure in large social networks; and improving the resilience of the electric power grid. Unlike traditional applications in computational science and engineering, solving these social problems at scale often raises new challenges because of the sparsity and lack of locality in the data, the need for research on scalable algorithms and development of frameworks for solving these real-world problems on high performance computers, and for improved models that capture the noise and bias inherent in the torrential data streams.”

Porting HPC Codes with Directives and OpenACC

In this video from ISC 2018, Michael Wolfe from OpenACC.org describes how scientists can port their code to accelerated computing. “OpenACC is a user-driven directive-based performance-portable parallel programming model designed for scientists and engineers interested in porting their codes to a wide-variety of heterogeneous HPC hardware platforms and architectures with significantly less programming effort than required with a low-level model.”

NEC Accelerates HPC with Vector Computing at ISC 2018

In this video from ISC 2018, Oliver Tennert from NEC Deutschland GmbH introduces the company’s vector computing technologies for HPC and Machine Learning. “The NEC SX-Aurora TSUBASA is the newest in the line of NEC SX Vector Processors with the worlds highest memory bandwidth. The Processor that is implemented in a PCI-e form factor can be configured in many flexible configurations together with a standard x86 cluster.”

Univa Brings Navops to HPC at ISC 2018

In this video, Gary Tyreman from Univa describes how the company is helping HPC users move their workloads to the Cloud with their Navops products. “Univa is the leading innovator in workload management and orchestration solutions. With Navops suite of products, Univa is bringing its expertise to containers. Univa Navops is a suite of products that enable enterprises to easily migrate to the cloud or hybrid cloud, increase efficiencies and run containers at scale.”

OpenACC Helps Scientists Port their code at the Center for Application Readiness (CARR)

In this video, Jack Wells from the Oak Ridge Leadership Computing Facility and Duncan Poole from NVIDIA describe how OpenACC enabled them to port their codes to the new Summit supercomputer. “In preparation for next-generation supercomputer Summit, the Oak Ridge Leadership Computing Facility (OLCF) selected 13 partnership projects into its Center for Accelerated Application Readiness (CAAR) program. A collaborative effort of application development teams and staff from the OLCF Scientific Computing group, CAAR is focused on redesigning, porting, and optimizing application codes for Summit’s hybrid CPU–GPU architecture.”

Legendary Magnum InfiniBand Switch comes to Computer History Museum

The Computer History Museum in Silicon Valley recently added a piece of TACC’s history into their permanent historical collection — sealing its place as a milestone in computing.

We’re always searching around the world for new, interesting, and important computing objects,” said Dag Spicer, senior curator at the Computer History Museum. “TACC’s Sun Microsystems 2007 Magnum switch was a critical part of high-performance computing at that time in history. The TACC switch was the largest of its class and is an example of InfiniBand technology, which has long been a key enabling technology for high performance computing.”

DDN Steps Up to HPC & AI Workloads at ISC 2018

In this video from ISC 2018, James Coomer from DDN describes the company’s latest high performance storage technologies for AI and HPC workloads. “Attendees at ISC 2018 learned how organizations around the world are leveraging DDN’s people, technology, performance and innovation to achieve their greatest visions and make revolutionary insights and discoveries! Designed, optimized and right-sized for Commercial HPC, Higher Education and Exascale Computing, our full range of  DDN products and solutions are changing the landscape of HPC and delivering the most value with the greatest operational efficiency.”