Scaling data centers for evolving AI models will help alleviate data bottlenecks by distributing workloads across thousands of GPUs. This extends beyond the capabilities of individual accelerators or processors ….
Synopsys Announces PCIe 7.0 IP for HPC-AI Chip Design
June 10, 2024 by
SUNNYVALE, Calif., June 10, 2024 — Synopsys (Nasdaq: SNPS) today announced what it said is the industry’s first PCIe 7.0 IP solution consisting of controller, IDE security module, PHY, and verification IP. The company said the offering will enable chip makers to address demanding bandwidth and latency requirements for transferring massive amounts of data for compute-intensive AI […]
Synopsys Says it Has First 1.6T Ethernet IP Solution for AI and Hyperscale Chips
February 29, 2024 by
SUNNYVALE, Calif., Feb. 29, 2023 – Synopsys, Inc. (Nasdaq: SNPS) today delivered what it said is a dramatic increase in bandwidth and throughput for data-intensive AI workloads with the industry’s first complete 1.6T Ethernet IP solution. Hyperscale data centers, a backbone in the era of pervasive intelligence, require high-bandwidth, low-latency chips and interfaces to process […]
Synopsys Work Flows Certified for Next-Generation Mobile and HPC Designs on TSMC N3E and N4P Processes
June 13, 2022 by
MOUNTAIN VIEW, Calif., June 13, 2022 — Aiming to help customers optimize performance, power and area (PPA) for next-generation system-on-chips (SoCs) used in mobile and high-performance computing applications, Synopsys, Inc. (Nasdaq: SNPS) today announced that TSMC has certified the Synopsys digital and custom design flows for its N3E and N4P process technologies. In addition, Synopsys’ leading Foundation IP […]
On the Front Lines of AI Automation: Life Sciences and Chip Design
September 9, 2021 by
Given the right task, AI-driven machines can be empowered with supercharged IQs that make the smartest humans look dumb, or at least inefficient. As we watch advances made in task automation, we see it burgeoning into fields previously (last week) thought unimaginable. Two recent reports underline the trend. In one, Carnegie Mellon University is teaming […]
NEC Selects Synopsys ZeBu Server 4 Emulation Environment for Supercomputer Verification
December 20, 2019 by
Today Synopsys announced that NEC has selected Synopsys’ ZeBu Server 4 as its emulation solution for the verification of its SX-Aurora TSUBASA high-performance compute solution products. “Developing super computers requires running and analyzing many software applications on the new HPC architecture,” said Akio Ikeda, deputy general manager, AI Platform Division at NEC Corporation. “ZeBu Server 4 enabled execution of our HPC host software without modifications and running billions of software cycles prior to tapeout. We selected ZeBu Server 4 because of its superior performance and very fast bring-up time.”
