ORLANDO, FL (Jan. 5, 2026) – The IEEE Electronic Components and Technology Conference (ECTC), has extended the deadline for the Student Innovation Challenge for ECTC 2026. Six winning student teams will have the opportunity to attend ECTC 2026 with financial assistance, including travel costs up to a specified amount. Eligible participants currently enrolled in an […]
Jan. 11 Pre-registration Deadline for IEEE Electronic Components and Technology Conference Student Innovation Challenge
Cornelis Networks and Supermicro Collaborate on Integrated AI-HPC Offering
Dec. 9, 2025: Cornellis Networks and Supermicro have announ ced Supermicro’s FlexTwin server platforms are now validated with Cornelis’ CN5000 networking for AI and HPC clusters. Cornelis’ CN5000 400Gbps networking platform is designed to address communication bottlenecks by providing data movement between servers — a critical factor in large AI and HPC deployments. Supermicro’s FlexTwin […]
@HPCpodcast: Silicon Photonics – An Update from Prof. Keren Bergman on a Potentially Transformational Technology for Data Center Chips
In this episode of the @HPCpodcast, sponsored by CoolIT, we catch up with optical I/O expert and repeat guest ….
PCI-SIG Announces PCIe 8.0 Spec to Reach 256 GT/s
SANTA CLARA, CA. – August 5, 2025 – PCI-SIG today announced the PCI Express (PCIe) 8.0 specification will double the data of the PCIe 7.0 specification to 256.0 GT/s and is planned for release to members by 2028. PCI-SIG technical workgroups will be developing the PCIe 8.0 specification with the following feature objectives: Delivering 256.0 […]
GigaIO Reports on Interconnect Technology Performance
Carlsbad, California, April 29, 2025 – Edge-to-core AI platform GigaIO has unveiled AI training, fine-tuning, and inference benchmarks that demonstrate the performance, cost and power efficiency of GigaIO’s AI fabric compared with RDMA over Converged Ethernet (RoCE). According to the company, results include 2x faster training and fine-tuning and 83x better time to first token […]
UALink Consortium Releases Ultra Accelerator Link 200G 1.0 Spec
Beaverton, OR – April 8, 2025 – The UALink Consortium today announced the ratification of the UALink 200G 1.0 Specification, which defines a low-latency, high-bandwidth interconnect for communication between accelerators and switches in AI computing pods. The UALink 1.0 Specification enables 200G per lane scale-up connection for up to 1,024 accelerators within an AI computing pod, delivering the […]









