[SPONSORED GUEST ARTICLE] AMD will hold a webinar on Thursday, July 17 at 11 am ET on AMD ROCm 6 Updates & What is HIP?
Register is here: https://webinar.amd.com/AMD-ROCm-6-Updates-What-is-HIP/en
This webinar consists of two parts, each addressing crucial aspects of the ROCm™ software ecosystem.
In the first part, we’ll explore the recent updates introduced in ROCm 6.0.x and analyze the performance implications of transitioning from ROCm 5.7 to ROCm 6.0, specifically focusing on the AMD CDNA™ 2 architecture for a few real-world applications. Given that ROCm 6.0.x enhancements are primarily aimed at bolstering support for CDNA3 and AMD RDNA™ 3 architectures, we’ll also introduce the AMD Instinct MI300X and MI300A GPU architectures. Additionally, we’ll delve into potential nuances related to memory management, particularly important when working with MI300A accelerated processing units (APUs).
In the second part, we’ll delve into HIP and its significance within the ROCm ecosystem. Through a historical lens, we’ll trace the evolution of ROCm concerning HIP and various AMD compiler aliases, elucidating the tooling provided to facilitate portability of HPC applications across GPUs from diverse vendors.
Stick around until the end for a live Q&A with our presenter, Joe Schoonover, and other HPC experts from AMD.
Main Topics
- Updates for ROCm 6.0.0 and 6.0.2 related to MI300 support and changes to supported operating systems and GPUs.
- Compare AMD CDNA2 and AMD CDNA3 architecture in addition to APU (MI300A) and discrete GPU (MI300X) architectures with an emphasis on memory spaces.
- Discuss compilers provided by ROCm for AMD GPUs and the relationship to HIP as a portability layer for multiple vendor GPUs.
Presented in Conjunction with the AMD HPC User Forum
The AMD HPC User Forum is a community of customers and users of AMD processor-powered HPC systems, led by its members. The Forum provides a platform to members through sharing and collaboration, with exchanges of high-quality technical content, shared member experiences, and leveraging of best practices.
This forum allows members the opportunity to speak directly to AMD executives and AMD product development leaders, to influence future AMD HPC product and solution designs.
Learn more about the AMD HPC User Forum.
