Reader Paul Adams pointed me to this story over at c|net’s News.com discussing the deeply practical research that Intel is spearheading to make its future manycore chips work in practice.
Recall that earlier this year Intel introduced a prototype 80 core chip which we’ve covered many times already.
First, the manycore chips are likely to be heterogeneous, according to Jerry Bautista, co-director of Intel’s Tera-scale Computing Research Program.
A 64-core chip, for instance, might contain 42 x86 cores, 18 accelerators and four embedded graphics cores.
The company is also working on the software infrastructure that will be key in making the chips practically applicable to the broader computing market. While the HPC community is fairly skilled at the basics of writing parallel code, your average Windows application coder isn’t, and that’s a problem.
One idea, proposed in a paper released this month at the Programming Language Design and Implementation Conference in San Diego, involves cloaking all of the cores in a heterogeneous multicore chip in a metaphorical exoskeleton so that all of the cores look like a series of conventional x86 cores, or even just one big core.
…A paper at the International Symposium on Computer Architecture, also in San Diego, details a hardware scheduler that will split up computing jobs among various cores on a chip.
…Intel is also tinkering with ways to let multicore chips share caches, pools of memory embedded in processors for rapid data access.
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