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Tilera's 64-core mesh chip

There’s been a lot of discussion during my time away this week about the new product from Tilera, a 64-core chip aimed at embedded tasks like video, routers, and security processing.

Tilera’s press page points to much of the discussion, and their announcement is here. The Register has this to say

The Silicon Valley-based start-up’s first product links together 64 RISC-like cores running at up to 1.0GHz. The real magic, however, stems from the five-lane switches used to link each core in an 8X8 grid that provides up to 32 terabits per second of data bandwidth across the whole chip. You end up with a product – Tile64 – that can tear through software threads.

…The mesh concept serves as a replacement for some of today’s processors that require a central bus to manage data traffic. Some companies have moved past the bus concept, in AMD’s case by creating its own high-speed interconnect called Hypertransport. Tilera extends that work by giving each core – or tile – five, independent networking lanes.

The company reportedly has 10 customers so far, but not everyone is ready to buy the early market hype.

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