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AMD intros new members of the six-core Istanbul family

Today AMD announced the next members of the Istanbul family of processors, the SE and HE models. This follows AMD’s customary announcement pattern in which the standard bin part is released first — AMD’s John Fruehe (director of business development for server workstations) explains that the standard bin Opteron accounts for about 70% of shipments — followed by the HE (low power) and SE (highest performance) versions next, and then finally by the ultra low power EE model which was just recently reintroduced into the server chip line.

Istanbul — the development code name for the six-core variant of AMD’s Opteron processor, was launched in the beginning of June with a whole slew of announcements from HPC vendors saying that they’d be using the new chip.

Large HPC clusters are often built out of the standard bin Opterons (an average rated power of 75w per socket) when AMD is used, rather than the SE as you might expect at first glance. This is because standard bin parts tend to offer both better price performance and the lower power consumption you need in anything other than moderate cluster deployments. Fruehe explains that the SE part (at 105W per socket) tends to do well in high performance scientific workstations, where aggregate power draw won’t be an issue. He does say that the lower power HE part (at 55W per socket) is seeing increased adoption in HPC, but that right now it tends to be built into systems that are more scale-out in nature (web or cloud infrastructure).

If you’re looking for comparisons, SPECpowerssj_2008 results for the 2376 HE (the Shanghai HE Opteron) are 18% lower than the newest 2425 HE (the Istanbul HE Opteron). Something interesting about all of these chips is that successive generations tend to remain in the same power envelope as their predecessors while delivering higher performance, simplifying system design for OEMs and maximizing flexibility for end users. The 75W envelope on today’s Istanbul Opteron hasn’t changed since Barcelona two generations ago. While AMD wouldn’t confirm the power of the final EE part when it ships, expecting it to come in at the same 40W of the Shanghai EE bin seems reasonable.

All of these variants use the standard socket 1207, which means that you could plug the new six-core part into your Barcelona or Shanghai machine, update the BIOS, and be ready to go. This upgrade path is of course followed more frequently in HPC than in general enterprise computing, where the mindset is to not touch a box once it’s working other than to replace it.

Istanbul still uses the DDR2 memory, of course. This will change in Q1 of the next calendar year when AMD introduces its next generation “Maranello” platform, aimed at the performance customer (i.e., us). Maranello will host the new G34 “Magny Cours” processor with 12 cores, 4 HyperTransport links, and 4 DDR3 memory channels. Maranello’s little brother (aimed more at the value customer) is the San Marino platform, which will initially come to market in Q2 of 2010 with a 6 core processor and 2 channels of DDR3 memory.

You can find AMD’s press release here.

Trackbacks

  1. […] “Large HPC clusters are often built out of the standard bin Opterons (an average rated power of 75w per socket) when AMD is used, rather than the SE as you might expect at first glance. This is because standard bin parts tend to offer both better price performance and the lower power consumption you need in anything other than moderate cluster deployments. Fruehe explains that the SE part (at 105W per socket) tends to do well in high performance scientific workstations, where aggregate power draw won’t be an issue. He does say that the lower power HE part (at 55W per socket) is seeing increased adoption in HPC, but that right now it tends to be built into systems that are more scale-out in nature (web or cloud infrastructure).” Full Story […]

  2. […] and dense computing” environments and weighs in at 40W. This follows the announcement of the SE and HE models in July, and rounds out planned variants of the six-core […]

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