When AMD announced the launch of its server chipset family, codenamed Fiorano, on Monday ahead of Intel’s IDF, it had the flavor of something that was rushed out the door. Recall that the family has three siblings on the northbridge
Today the company announced three different northbridge chipsets, the SR5650, SR5670, and the SR5690, which are to be paired with the SP5100 southbridge. All three northbridge versions are aimed at Socket F and support HypterTransport 3, and PCI Express 2.0 (up to 42 lanes according to one report but we are still waiting for confirmation from AMD), among other features.
Some of the info missing included performance specs on the family beyond some very basic info. The Register is now filling in some of those details.
The main differences between the three pairings have to do with how many PCI-Express engines are on the chip, how many PCI-Express lanes they deliver, and how much juice the I/O hub burns. The SR5650 has eight engines and 22 lanes, and has a maximum thermal design point of 13 watts and an idle power rating of 7.1 watts. This is the I/O hub that will be used in the most energy conscious platforms.
The SR5670 has a max TDP of 17 watts and an idle power of 7.3 watts. It is hotter because it has nine PCI engines and offers 30 lanes. The SR5690 has eleven engines and 42 lanes, and is rated at 18 watts TDP and 7.5 watts idle power consumption. The SR5690 supports hot-plug PCI-Express 2.0 peripherals, while the two smaller I/O hubs do not.