Timothy Prickett Morgan is reporting at The Register today that IBM has released its Engineering and Scientific Subroutine Library (ESSL) for AIX V5.1. Readers of this site will likely already know that ESSL is IBM’s math library with tuned implementations of the BLAS, eigensystem analysis, Fourier transforms, and other goodness that developers of scientific and engineering apps need to make their codes go fast on IBM’s chips.
The important thing is that the ESSL libraries work with serial and parallel programs, and know how to run in parallel on threads within a single SMP system. If you want to run an HPC application across a Power/AIX cluster linked together using the Message Passage Interface (MPI) protocol commonly used with supercomputers, then you need to get Parallel ESSL, which is an add-on. And you get IBM’s Tivoli Workload Scheduler LoadLeveler to batch up the various workloads on the cluster to run them on the parallel cluster.
Both the serial and SMP libraries in the core ESSL product have been tuned to make full use of the AltiVec SIMD units on Power6 and Power6+ chips and the VSX SIMD units on the Power7 processors. ESSL can support 32-bit or 64-bit integers and pointers, and can be called from Fortran, C, and C++ programs running on AIX 5.3 or 6.1. (By the way, ESSL V5.1 will be the last library set to run on Power iron using AIX 5.3.) ESSL V5.2 will be available on June 25.