HP’s Marc Hamilton came away from a recent meeting on future HPC Design Challenges with some interesting thoughts on power, cooling, and IO.
Flash roadmaps are well understood and seeing evolutionary improvements. However, the looming mainstream introduction of PCIeGen3 server interconnects and new PCIeGen3 flash controllers offers interesting possibilities. To take advantage of the storage bandwidth possible with PCIeGen3 will require rethinking the software interface. Strip away legacy storage protocols (FC, SCSI, SAS, etc.) and even perhaps the file system and you now have real possibilities. Longer term, today’s flash technology will give way to fundamental new memory technologies, such as HP’s memristor which promise to provide not only new levels of performance but significantly lower power usage.
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