SAAHPC’10 is coming up just next week. If you are planning to be there, and you read insideHPC (who doesn’t!), then you’ll have a rare treat to see our own John Leidel doing his day job.
John is giving a tutorial on Monday and a paper on Tuesday. First, the tutorial
Hybrid-Core Computing: Extending a Commodity Instruction Set with Application-Specific Logic
Hybrid-core computing combines a commodity instruction set architecture (ISA) with application-specific instructions (called “personalities”) to accelerate application performance. This tutorial will cover the architecture of the Convey HC-1 and how FPGAs are used to implement custom instructions. We will include examples of how these custom ISAs can improve performance of HPC applications, as well as an in-depth look at the workflow used to develop your own personalities.
Next, the talk
Design Philosophies for Memory-Centric Instruction Set Architectures
The discussion outlines a high-level assessment of historical memory performance as a function of overall functional throughout (basically % of peak performance). Systems whose overall small operand memory performance (often measured by the RandomAccess memory benchmark) have historically delivered higher orders of efficiency. As a result, I lay out design methodologies to develop new algorithms and instruction sets based first on the data “operands” and second, the “operations”. In doing so, the eventual balanced implementation will deliver optimal levels of peak platform performance. In today’s power-minded HPC audience, there is no logical reason to build more function units than can be fed by its associated memory subsystem.
If you go to either of these talks, snap a pic with your cellphone and send it to me here and we’ll get it up on the site.
