In this special guest feature, Intel’s John Hengeveld lists the things he’ll be looking at ISC’11.
I love the now annual trek to Hamburg for ISC. I love the eclecticism of the city. I love the garden by the convention center (which is a great jogging path…) It’s a great place to stop and take a breath.
Beatles and Herring.
Chaos and Substance.
I also love ISC. I go to many of the events in the technical computing industry and ISC is a really interesting show. Each year great new ideas attack the dogma of HPC at ISC. “Commercial Off the Shelf will never make good HPC,” “Linux isn’t reliable enough,” “Nobody outside of the ivory towers needs HPC,” “Moore’s Law will run out before we get to Petascale,” and thud! Another bit of doctrine falls.
Each year I make my list of what I am looking for at ISC. What are the questions that need answering? Who is going to step up to create the buzz of the show floor? What new technology or idea will set aside the previously unassailable?
Here is my list for 2011:
- It’s the Workload Stupid: While the industry waits for major new platforms based on silicon coming in the second half of this year, there is still a great deal of innovation going on based on existing architectures. One of my pet theories is that there are many workloads in HPC that require distinct design points in hardware and software to achieve efficient and cost effective performance. Since there isn’t one form of parallelism or a canonical data structure, one size cannot fit all… Hence there is a thirst for architectural reinvention to deliver optimized performance. How are architectural innovators performing and how is their innovation being accepted to serve the distinct classes of workloads? Are major OEMs continuing to deliver new design points that target distinct HPC workloads?
- Alternate Architecture Acceptance: How have attached coprocessors like Intel’s MIC products and Nvidia and ATI GPGPUs been accepted as tools for delivering performance leading up to an exascale era? Are the advancements in software development methodology keeping pace with the complexity requirements and putting us on the glide slope we need as an industry? Intel has been signaling that we will see new proof points on its MIC architecture. Will Intel make its case that this architecture has legs? Will it make the case that the software model is viable?
- Will HPC get its heads into the clouds? I have heard enough talk about HPC in the CLOUD. I want to see the industry start to pull together solutions. There is a relationship between HPC in the Cloud and the so called “Missing middle.” The missing middle is a moniker that refers to the many potential HPC customers who need HPC for technical computing, but cannot access it for technical, economic or social reasons. HPC in the Cloud could be one means of servicing these requirements. How will the industry bridge this gap? Intel has ideas here – But so do many others, watch this space.
- Is FABRIC ripping at the seams: I am concerned that the rate of fabric development is not going to keep up with node level performance. Fabric remains a key bottleneck to HPC performance. What technologies are going to change the game in interconnect?
- Is Efficiency the Hobgoblin? Will the top500 list show any improvement in efficiency? Some of the systems to enter the top 10 have been hybrid systems with great peak flops, but pretty miserable efficiency numbers. Is this a trend that cannot be stopped?
Anyway, between the Beatles statues on the Raiperbahn and the windmills on the shore, A lot goes on in Hamburg. I think perhaps the industry will catch its breath and assess its challenges and opportunities, I hope it does… The path to exascale will consume us soon enough; we need the stamina to crash through.
I’m sure we will see interconnect performance keep up with the servers…right now it’s really the PCIe bus that’s the bottleneck…looking forward to Gen3.
as for the efficiency, it’s true…as more folks turn to GPUs to extend peak performance the efficiency is way down for a number of reasons. As more mechanisms come into place to offload the CPU from handling extra memory copies from the GPU to the interconnect, I believe this issue will soon be solved…