ZURICH – February 7, 2022 – RISC-V International, the global open hardware standards organization, today announced that Intel Corporation has joined RISC-V International at the premier membership level.
“This move demonstrates Intel’s strategic investment in open collaboration and support of the open RISC-V architecture and highlights numerous deep RISC-V member partnerships with Intel,” RISC-V said in its announcement. Bob Brennan, Vice President of Customer Solutions Engineering for Intel Foundry Services, will be joining both the RISC-V Board of Directors and Technical Steering Committee.
The open RISC-V ecosystem provides open modular building blocks that are essential for modern computing. In joining RISC-V as a Premier member, Intel is leading and expanding RISC-V ecosystem potential for industry stakeholders. RISC-V’s open collaboration model, combined with freedom of design across domains and industries, facilitates technology innovation for the hardware community and RISC-V members. Intel’s planned investments and commitment to open collaboration on RISC-V will strengthen the overall ecosystem and drive commercialization of RISC-V.
“Intel is pleased to join the community in RISC-V International,” said Brennan. “A rich open source software and hardware ecosystem is critical for accelerating the growth and adoption of RISC-V and fully unlocking value for chip designers. Intel is delighted to support the growth of the free and open RISC-V instruction set architecture. We look forward to optimizing IP for Intel process technologies to ensure that RISC-V runs best on IFS silicon across all types of cores, from embedded to high-performance.”
Intel is a pioneer in the microprocessor industry, having built the first commercially available microprocessor. The company already offers Nios V processors based on RISC-V. Intel’s growing investment in RISC-V will enable acceleration of the development of open RISC-V IP and other deliverables together with the RISC-V community. Today Intel announced several immediate RISC-V community benefits led by Intel Foundry Services (IFS). IFS will sponsor an open-source software development platform that allows for freedom in experimentation, including partners across the ecosystem, universities, and consortia. The IFS strategy will provide a broad range of leadership intellectual property (IP) optimized for Intel process technologies. IFS is the only foundry to offer IP optimized for all three of the industry’s leading ISAs: x86, Arm and RISC-V. Intel has already seen strong demand from foundry customers to support more RISC-V IP offerings.
“Intel has been a leader in microprocessor innovation for decades and today’s announcements signal the recognition that massive investment in open source has the power to change the course of history,” said Calista Redmond, CEO, RISC-V International. “Open collaboration in RISC-V has already ignited a profound shift in the semiconductor industry, and this partnership will accelerate innovation in open computing. RISC-V welcomes Intel and looks forward to our collective expansion and the commercial adoption of RISC-V across compute workloads and industries, growing RISC-V everywhere.”
“The dependencies between software and hardware have become more intertwined,” said Jim Zemlin, Executive Director, The Linux Foundation. “Recent decades have shown us how investment in open technology stacks and collaboration with a community creates tremendous value for everyone involved. Intel’s investment in an open source software development platform for RISC-V will contribute to this trend, creating a paradigm shift in the open source ecosystem.”
Together with Intel, the RISC-V community is collaborating on building essential IP for RISC-V cores, developing innovations for various market segments, and cultivating the supporting software community as a whole. Intel has also indicated support of the RISC-V ecosystem through collaboration on technology co-optimization, prioritizing wafer shuttles, supporting customer designs, building development boards and software infrastructure, and more.
Key announcements from RISC-V Members:
- “Intel making available its state-of-the-art silicon processes and Open Chiplet Platform packaging technologies along with its formidable manufacturing capacity to Andes Technology and other RISC-V IP suppliers’ customers will greatly accelerate the widespread adoption of the open-source RISC-V ISA.” – Frankwell Lin, President and Co-founder Andes Technology. See press release.
- “Intel’s announcement indicates its strong support for the RISC-V Community, which will be invaluable in helping to advance and proliferate RISC-V solutions from Esperanto and others. This will benefit not just the fast-growing RISC-V ecosystem, but all end users of RISC-V technology across the industry.” – Art Swift, President and CEO at Esperanto Technologies. See press release.
- “Alongside Intel’s substantial investment in the RISC-V ecosystem, SiFive is doubling down on our vision to bring RISC-V everywhere and expanding our industry-leading RISC-V product line deeper into performance-driven and mission-critical markets. SiFive previously announced a collaboration with Intel using the SiFive Performance P550 processor to build a RISC-V development platform based on the Intel “Horse Creek” SoC that will be at the heart of a new RISC-V reference platform. We look forward to extending our relationship with IFS and their customers as we prove that RISC-V has no limits, powered by SiFive.” – Rohit Kumar, SVP Engineering, SiFive. See press release.
- “Intel joining RISC-V International is a significant validation and a great step forward towards driving RISC-V adoption across several high-performance market verticals. We are excited to announce our strategic partnership with Intel to make Ventana’s high-performance RISC-V cores and chiplets available through Intel Foundry Services (“IFS”) to leading customers in the Data Center, 5G/Edge, Networking, Storage, AI/ML, Automotive and Client market verticals.” – Balaji Baktha, Founder and CEO of Ventana Micro. See press release.
