A consortium of tech industry heavyweights today announced the Universal Chiplet Interconnect Express (UCIe) industry consortium with a mission to establish a die-to-die interconnect standard and foster an open chiplet ecosystem.
Founding members include Advanced Semiconductor Engineering, Inc. (ASE), AMD, Arm, Google Cloud, Intel Corporation, Meta, Microsoft Corporation, Qualcomm Incorporated, Samsung, and Taiwan Semiconductor Manufacturing Company .
The consortium described UCIe is an open specification that defines the interconnect between chiplets within a package, enabling an open chiplet ecosystem and ubiquitous interconnect at the package level. The organization said it wants to address customer requests for more customizable package-level integration, “connecting best-in-class die-to-die interconnect and protocols from an interoperable, multi-vendor ecosystem.”
“Chiplets are an important way to tightly couple heterogeneous computing capabilities in order to handle diverse workloads efficiently,” Steve Conway, senior adviser, HPC market dynamics, at HPC industry analyst firm Hyperion Research. “But without industry-standard connections, each vendor might bear the cost of maintaining its own connection technology and chiplets might be economically unfeasible. ”
The consortium said the founding companies have ratified the UCIe specification, an open industry standard developed to establish a ubiquitous interconnect at the package level. The UCIe 1.0 specification covers the die-to-die I/O physical layer, die-to-die protocols and software stack which leverage the PCIe and Compute Express Link (CXL) industry standards. The specification will be available to UCIe members and available to download on the website.
“Founding consortium companies represent a wide range of industry expertise and include cloud service providers, foundries, system OEMs, silicon IP providers, and chip designers, and they are in the process of finalizing incorporation as an open standards body,” the consortium said in its announcement. “Upon incorporation of the new UCIe organization later this year, member companies will begin work on the next generation of UCIe technology, the consortium said, including defining the chiplet form factor, management, enhanced security, and other essential protocols.”
More information about UCIe can be found in this white paper.
“The age of chiplets has truly arrived, driving the industry to evolve from silicon-centric thinking to system level planning and placing crucial focus on co-design of IC and package,” said Dr. Lihong Cao, director of engineering and technical marketing at ASE, Inc. “We are confident that UCIe will play a pivotal role in enabling ecosystem efficiencies, by lowering development time and cost through open standards for interfaces between various IPs within a multi-vendor ecosystem as well as utilization of advanced package level interconnect. There is broad industry recognition that Heterogeneous Integration will help bring Chiplet-based designs to market. Given ASE’s expertise in packaging, assembly, and interconnect platform technology, we will provide UCIe with meaningful perspective to ensure forthcoming standards are practicable, complemented by commercially viable performance and manufacturing costs for package level manufacturing.”
