New Book Offers Insight into Coding for Intel Xeon Phi

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This week Elsevier announced the release of Intel Xeon Phi Coprocessor High Performance Programming, by Intel evangelists Jim Jeffers and James Reinders.

The book benefits software engineers, scientific researchers, and high performance and supercomputing developers in need of high-performance computing resources, by:

  • Providing a guide to exploiting the parallel power of the Intel Xeon Phi coprocessor for high-performance computing
  • Presenting best practices for portable, high-performance computing and a familiar and proven threaded, scalar-vector programming model
  • Including simple but informative code examples that explain the unique aspects of this new highly parallel and high performance computational product
  • Covering wide vectors, many cores, many threads and high bandwidth cache/memory architecture

I got my hands on a preliminary copy of the book back in November at SC12, and I can tell you that Jim and James did a great job.

The book release coincides with the formal dedication of the Stampede supercomputer at the Texas Advanced Computing Center in Austin. Stampede is currently ranked number seven on TOP500, with over 6400 Intel Xeon Phi coprocessors. Jeffers and Reinders have today committed several hundred books to support TACC’s training efforts for Stampede.

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