Fault Trees

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FaultTreeAs datasets and simulations continue to increase in size and complexity, interactivity with the data should be maintained. It is important to understand how SIMD parallelism can be used when evaluating large fault tree expressions on a large volume of input.

Expressions are the mathematical relationship between symbols according to some syntax grammar. Expression evaluation can be used for evaluating large fault trees for vulnerability assessment. This kind of assessment is valuable when evaluating a system of interest. For example, a ballistic simulation may require many different elements of computation to fully model an objects vulnerability. Vulnerability can be measured at different levels, using the Probability of Kill (Pk). Understanding the ballistic vulnerability requires sampling of up to billions of trajectories to understand which threat may hit a vehicle.

The input to the fault tree implementation is a list of system definitions. From this, an instruction array can be compiled and the sets can be evaluated. The goal of creating an evaluation array is to build a set of instructions which calculate a given system’s value given a set of input component values. A system evaluation implementation is straightforward, but initially does not take advantage of SIMD hardware. However, the system is a data parallel operation, which can be modified to take advantage of such hardware. The Intel SPMD Program Compiler (ipsc) can do a lot of the work to vectorize the code.

Fault trees can be parsed and can be evaluated on SIMD machines using ispc. The application can be greatly speeded up by using a combination of ispc and then coalescing the data layout to minimize expensive vector scatter/gather memory transactions.

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Source: SURVICE Engineering, USA