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Video: RISC-V momentum around the world, from edge to HPC

Calista Redmond is CEO of the RISC-V Foundation.

In this keynote talk from the 2020 HiPEAC conference, RISC-V Foundation Chief Executive Calista Redmond explains how the RISC-V open-source instruction set architecture is gathering momentum around the world, finding applications across the compute continuum from edge to high-performance computing.

With open hardware riding a wave at the moment, there has perhaps never been so much focus on the RISC-V instruction set architecture (ISA), which has been championed for several years by HiPEAC members. In this interview, the conference communications team caught up with Calista Redmond to find out more.

HiPEAC: Why is this an exciting time to be working on open hardware projects?

Calista Redmond: As computing demands continue to rise thanks to artificial intelligence, machine learning, the internet of things (IoT) and virtual/augmented reality (VR/AR), there is a growing demand for custom processors purpose-built to meet the power and performance requirements of specific applications. RISC-V is enabling the industry to optimize designs for today’s computing requirements and innovate faster.

Throughout my career, I’ve been proud to be part of a number of open source initiatives to drive tech innovation forward and foster industry-wide collaboration. The RISC-V ecosystem is one of the most dynamic communities I’ve seen to date. Over the last few years, the membership has grown exceptionally fast and includes a broad mix of organizations in different industries.

As I’ve been travelling across the globe to promote the benefits of RISC-V at events and meet with our member companies, it’s really stuck me how the level of commitment to drive the mainstream adoption of RISC-V is like nothing I’ve seen before. It’s exhilarating to witness our community collaborate across industries and geographies with the shared goal of accelerating the RISC-V ecosystem.

HiPEAC: What advantages does RISC-V offer as opposed to commercial ISAs? What opportunities does RISC-V open up, both for research and business?

Unlike legacy instruction set architectures (ISAs) which are decades old and are not designed to handle the latest workloads, RISC-V has a variety of advantages including its openness, simplicity, clean-slate design, modularity, extensibility and stability. Thanks to these benefits, RISC-V is ushering in a new era of silicon design and processor innovation.

We’ve seen that RISC-V:

  • Unlocks architecture and enables innovation. RISC-V is a layered and extensible ISA so companies can easily implement the minimal instruction set, well-defined extensions and custom extensions to create custom processors for cutting-edge workloads.
  • Reduces risk and investment by enabling companies to leverage established and common intellectual property (IP) building blocks with the development community’s growing set of shared tools and development resources.
  • Provides the flexibility to create thousands of possible custom processors. Since implementation is not defined at the ISA level, but rather by the composition of the system-on-chip (SoC) and other design attributes, engineers can choose to go big, small, powerful or lightweight with their designs.
  • Accelerates time to market through collaboration and open source IP reuse. RISC-V not only reduces development expenses, but also enables companies to get their designs to market faster.

In addition to the many benefits RISC-V offers companies, the simple fixed base ISA and modular fixed standard extensions also make it easy for researchers, teachers and students to leverage RISC-V to learn and push the boundaries of design.

HiPEAC: Is open hardware really sustainable? How does the business case stack up?

Calista Redmond: With more than 420 organizations, individuals and universities that are members of the RISC-V Foundation, there is a really vibrant community collaborating together to drive the progression of ratified specs, compliance suites and other technical deliverables for the RISC-V ecosystem. While RISC-V has a BSD open source licence, designers are welcome to develop proprietary implementations for commercial use as they see fit. RISC-V offers a variety of commercial benefits, enabling companies to accelerate development time while also reducing strategic risk and overall costs. Thanks to these design and cost benefits, I’m confident that members will continue to actively contribute to the RISC-V ecosystem to not only drive innovation forward, but also benefit their bottom line.

HiPEAC: What’s the role of the RISC-V Foundation in promoting the RISC-V ISA?

Calista Redmond: The RISC-V Foundation’s role is to build an open, collaborative community of software and hardware innovators while directing the future development and adoption of the RISC-V ISA. The Foundation hosts over 20 work groups and committees that are hands-on developing the extensions, tools and strategy to accelerate implementation design and adoption. We have groups focused on security, ISA extensions, verification and compliance, emulation, software, and several on industry specific interests such as high-performance computing (HPC) and academia.

To gather the community together, each year the RISC-V Foundation hosts global events to discuss current and prospective RISC-V projects and implementations, commercial and open-source implementations, software and silicon, vectors and security, applications and accelerators, simulation infrastructure and much more. We also actively promote independently hosted Meetups and events centred around RISC-V.

We encourage organizations, individuals, and enthusiasts to join our ecosystem and together enable a new era of processor innovation through open standard collaboration.

HiPEAC: Can you name some of your favourite projects using RISC-V?

Calista Redmond: I don’t have a favorite project, but rather I love the amazing spectrum that RISC-V is engaged in – from a wearable health monitor to scaled out cloud data centres, from universities in Pakistan to the University of Bologna in Italy or Barcelona Supercomputing Center in Spain, from design tools to foundries, from the most renowned global tech companies to entrepreneurs raising their first round of capital. Our community is broad, deep, growing and energized.

HiPEAC: What are some of the plans for the future of RISC-V?

Calista Redmond: The Foundation’s goal is to accelerate industry adoption of RISC-V for the shared benefit of the entire community of stakeholders. We’ll continue to do that by driving progression and closure on standards and technical deliverables, making it easier for companies to implement RISC-V cores in their products. Another priority is growing the overall member community across stakeholder areas and deepening community engagement. We will do this by focusing on expanding the ecosystem across industries and geographies, along with offering more support and educational tools so operating systems, hardware implementations and development tools can scale faster.

The RISC-V ecosystem is poised to significantly grow over the next five years. Semico Research predicts that the market will consume a total of 62.4 billion RISC-V central processing unit (CPU) cores by 2025! By that time I look forward to seeing many new types of RISC-V implementations including innovative consumer devices, industrial applications, high performance computing applications and much more.

Calista Redmond is the CEO of the RISC-V Foundation with a mission to expand and engage RISC-V stakeholders, compel industry adoption, and increase visibility and opportunity for RISC-V within and beyond the Foundation. Prior to the RISC-V Foundation, Calista held a variety of roles at IBM, including Vice President of IBM Z Ecosystem where she led strategic relationships across software vendors, system integrators, business partners, developer communities, and broader engagement across the industry. Focus areas included execution of commercialization strategies, technical and business support for partners, and matchmaker to opportunities across the IBM Z and LinuxOne community. Calista’s background includes building and leading strategic business models within IBM’s Systems Group through open source initiatives including OpenPOWER, OpenDaylight, and Open Mainframe Project. For OpenPOWER, Calista was a leader in drafting the strategy, cultivating the foundation of partners, and nurturing strategic relationships to grow the org from zero to 300+ members. While at IBM, she also drove numerous acquisition and divestiture missions, and several strategic alliances. Prior to IBM, she was an entrepreneur in four successful start-ups in the IT industry. Calista holds degrees from the University of Michigan and Northwestern University.

Source: HiPEAC

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