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Astera Labs lands funding for purpose-built connectivity solutions

Today Astera Labs announced that it has closed its Series B funding with renowned technology investors including Sutter Hill Ventures, Intel Capital, Avigdor Willenz, and Ron Jankov. This investment round, along with a strategic collaboration with TSMC for manufacturing, positions Astera Labs to rapidly scale production of its Aries Smart Retimer, the world’s first Smart Retimer Portfolio for PCI Express (PCIe) 4.0 and 5.0 solutions, and to accelerate development of additional product lines for Compute Express Link (CXL) solutions.

We are very proud of the significant industry traction for our Aries Smart Retimer Portfolio which has been extensively tested with all major CPU, GPU and PCIe 4.0 endpoints,” said Jitendra Mohan, CEO, Astera Labs. “We look forward to accelerating this momentum by partnering with such a distinguished group of technology and manufacturing heavyweights to develop purpose-built connectivity solutions for data-centric systems.”

Astera Labs Inc., a fabless semiconductor company headquartered in the heart of California’s Silicon Valley, is a leader in purpose-built connectivity solutions for data-centric systems. The company’s product portfolio includes system-aware semiconductor integrated circuits, boards and services to enable robust PCIe connectivity. Partnering with leading processor vendors, cloud service providers, seasoned investors and world-class manufacturing companies, Astera Labs is helping customers remove performance bottlenecks in compute-intensive workloads.

In this video, Jitendra Mohan, Chief Executive Officer of Astera Labs, discusses our collaboration with Intel Capital and continued mission to solve connectivity bottlenecks throughout the data center. As Artificial Intelligence and Machine Learning workloads become more mainstream, cloud service providers are deploying heterogeneous compute systems to address these high performance, low-latency demands. 

Heterogeneous computing and workload-optimized platforms are driving the need for faster and lower-latency interconnects in data-centric systems,” said Zane Ball, corporate vice president and general manager, Data Platforms Engineering & Architecture, Intel Corporation. “We’re pleased to continue our collaboration with Astera Labs to support accelerated scale with the delivery of their PCIe solutions today and emerging CXL solutions tomorrow.”

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