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2019: The Year of PCI Express 4.0

Computer systems are about to get a whole lot faster. This year starting at the high end of the market a transition will begin toward systems based on PCI Express 4.0. The interconnect speed will double to 64GB/sec in a 16 lane connection. Tim Miller, Vice President Strategic Development for One Stop Systems, explores the expected speed and innovation stemming from the introduction of PCI Express 4.0. 

Implementing PCIe Gen 4 Expansion

After a long run for PCI Express (PCIe) Gen 3, Gen 4 is fast becoming the latest de facto standard for general purpose I/O of the modern computer system. “The ability to run PCIe over cable at full performance with complete software transparency has opened up a range of new application possibilities over the past decade for CPU to I/O system re-partitioning with expansion systems uniquely situated to take advantage of the new PCIe Gen 4 bandwidth soon available on servers.”

Mellanox & Cadence Demonstrate PCI Express 4.0 Multi-Lane PHY IP Interoperability

Today Cadence announced a collaboration with Mellanox Technologies to demonstrate multi-lane interoperability between Mellanox’s physical interface (PHY) IP for PCIe 4.0 technology and Cadence’s 16Gbps multi-link and multi-protocol PHY IP implemented in TSMC’s 16nm FinFET Plus (16FF+) process. Customers seeking to develop and deploy next-generation green data centers can now use a silicon-proven IP solution from Cadence for immediate integration and fastest market deployment. Cadence and Mellanox are scheduled to demonstrate electrical interoperability for PCIe 4.0 architecture between their respective PHY solutions at the 2016 TSMC Symposium on March 15, 2016 in Santa Clara, California.