Special guest and last year’s ISC program chair John Shalf joins Shahin and Doug in this episode of the @HPCpodcast, sponsored by Lenovo, to discuss the rise of specialized architectures to boost HPC performance in the post-Moore’s Law era. This is a topic John will discuss during Wednesday night’s keynote at ISC 2024 in Hamburg next week.
Reminiscent of the so-called “Attack of the Killer Micros” heralding the arrival of microprocessors for HPC in the early 1990s, John tells us there’s the potential for what could be called the “Attack of the Killer Chiplets” over the next five to 10 years, along with similar technologies like Coarse-Grain Reconfigurable Arrays (CGRA), to enable specialized architectures, re-define computing and provide new avenues for advancing supercomputing speed and energy efficiency.
John, possessed of an encyclopedic knowledge of HPC technology going back decades, is department head for computer science research at Lawrence Berkeley National Laboratory and formerly was CTO at the National Energy Research Supercomputing Center.
He has co-authored more than 60 publications in the field of parallel computing software and HPC technology, including the widely cited “The Landscape of Parallel Computing Research: A View from Berkeley” (with David Patterson and others). He also co-authored “ExaScale Software Study: Software Challenges in Extreme Scale Systems,” which set the Defense Advanced Research Project Agency’s IT research investment strategy for the next decade. He was a member of the Berkeley Lab/NERSC team that won a 2002 R&D 100 Award for the RAGE robot.
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