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Cavium Joins OpenCAPI for Next-gen Platforms

Today Cavium announced it is collaborating with IBM for next generation platforms by joining OpenCAPI, an initiative founded by IBM, Google, AMD and others. OpenCAPI provides high-bandwidth, low latency interface optimized to connect accelerators, IO devices and memory to CPUs. With this announcement Cavium plans to bring its leadership in server IO and security offloads to next generation platforms that support the OpenCAPI interface. “We are excited to be a part of the OpenCAPI consortium. As our partnership with IBM continues to grow, we see more synergies in high speed communication and Artificial Intelligence applications.” said Syed Ali, founder and CEO of Cavium. “We look forward to working with IBM to enable exponential performance gains for these applications.”

CCIX Project to link ARM Processors and FPGAs for HPC

Today ARM, Xilinx, Cadence, and Taiwan Semiconductor announced plans to produce the first test chip for the Cache Coherent Interconnect for Accelerators (CCIX) project. CCIX (pronounced “C6”) aims to prove that many-core ARM processors linked to FPGAs have a home in HPC. “The test chip will not only demonstrate how the latest Arm technology with coherent multichip accelerators can scale across the data center, but reinforces our commitment to solving the challenge of accessing data quickly and easily.”

Open CAPI: A New Standard for High Performance Attachment of Memory, Acceleration, and Networks

In this video from the Switzerland HPC Conference, Jeffrey Stuecheli from IBM presents: Open CAPI, A New Standard for High Performance Attachment of Memory, Acceleration, and Networks. “OpenCAPI sets a new standard for the industry, providing a high bandwidth, low latency open interface design specification. This session will introduce the new standard and it’s goals. This includes details on how the interface protocol provides unprecedented latency and bandwidth to attached devices.”

Radio Free HPC Looks into the New OpenCAPI Consortium

In this podcast, the Radio Free HPC team looks at the new OpenCAPI interconnect standard. “Released this week by the newly formed OpenCAPI Consortium, OpenCAPI provides an open, high-speed pathway for different types of technology – advanced memory, accelerators, networking and storage – to more tightly integrate their functions within servers. This data-centric approach to server design, which puts the compute power closer to the data, removes inefficiencies in traditional system architectures to help eliminate system bottlenecks and can significantly improve server performance.”

New OpenCAPI Consortium to Boost Server Performance 10x

“IBM has decided to double down on our commitment to open standards and enablement of industry innovation by opening up access to our CAPI technology to the entire industry. With the support of our OpenCAPI co-founders, we have created a new OpenCAPI specification that tremendously improves performance over our prior specification and IBM will be among the first to implement it with our POWER9 products expected in 2017.”