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Interview: Advancing Computational Chemistry with NWChem

Karol Kowalski, Capability Lead for NWChem Development at PNNL

“The notion of High Performance Computing is evolving over time. So what was deemed a leadership class computer five years ago is a little bit obsolete. We are talking about the evolution not only in the hardware but also in the programming models because there are more and more cores available. Orchestrating the calculations in the way that can effectively take advantage of parallelism takes a lot of thinking and a lot of redesign of the algorithms behind the calculations.”

An Open Letter from Intel’s Raj Hazra: Entering the Era of Code Modernization

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In this introduction letter to the Print ‘n Fly Guide to SC14 New Orleans, Intel’s Raj Hazra describes the grand challenge of code modernization that faces the HPC community.

Seismic Code Modernization Yields Petascale Performance and Gordon Bell Award Nomination

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The Gordon Bell Prize is one of the highest honors in high performance computing. For 2014, a collaborative research project co-led by Michael Bader from Technische Universität München (TUM) and Christian Pelties from Ludwig-Maximilians-Universität München (LMU), both from Germany, and Alexander Heinecke of Intel, has been nominated for their groundbreaking code modernization work with SeisSol, a scientific software package that provides numerical simulation of seismic wave phenomena.

5 Reasons to Visit the Intel Booth at SC14

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Over at the Data Stack, Intel HPC Evangelist Mike Bernhardt writes “Five Reasons to Visit the Intel Booth at SC14.”

Leveraging Parallelism on Intel Xeon Phi Coprocessors and Multicore Processors

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With 69 contributors from academia and industry, a new book shows how to leverage parallelism on processors and coprocessors with the same programming, providing detailed illustrations of effective ways to combine Intel Xeon Phi coprocessors with multicore processors.

It is Here: The Print ‘n Fly Guide to SC14 New Orleans

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At insideHPC, are very pleased to publish The Print ‘n Fly Guide to SC14 in New Orleans. We designed this 25-page Guide to be an in-flight magazine custom tailored for your journey to the Big Easy at SC14.

Eric Barton on Improving Lustre RAS with Fast Forward Collectives

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In this video, Eric Barton from Intel describes how the company is leveraging Fast Forward Collectives to improve Lustre RAS.

Podcast: The Return of the Intel Parallel Universe Computing Challenge

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In this Chip Chat podcast, Mike Bernhardt, Community Evangelist for HPC and Technical Computing at Intel, discusses the importance of code modernization as we move into multi- and many-core systems in the HPC field. According Bernhardt, markets as diverse as oil and gas, financial services, and health and life sciences can see a dramatic performance improvement in their code through parallelization.

Mark Seager on Why the Best is Yet to Come for HPC

Mark Seager, CTO of Technical Computing Ecosystem at Intel

“The single most important truth about high-performance computing (HPC) over the next decade is that it will have a more profound societal impact with each passing year. The issues that HPC systems address are among the most important facing humanity: disease research and medical treatment; climate modelling; energy discovery; nutrition; new product design; and national security. In short, the pace of change and of enhancements in HPC performance – and its positive impact on our lives – will only grow.”

Understanding I/O Patterns at the Block Level with ioprof

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Over at Admin HPC, Intel’s Jeff Layton writes that understanding how data makes its way from the application to storage devices is key to understanding how I/O works and that monitoring the lowest level of the I/O stack, the block driver, is a crucial part of this overall understanding of I/O patterns.