Intel has announced the availability of Intel Enterprise Edition for Lustre* software V18.104.22.168. This maintenance release has the latest CVE updates from RHEL 7.2. Intel also announced a pair of Lustre events coming to SC16 in Salt Lake City.
“With up to 72 out-of-order cores, the new Intel Xeon Phi processor delivers over 3 teraFLOPS (floating-point operations per second) of double-precision peak while providing 3.5 times higher performance per watt than the previous generation. As a bootable CPU with integrated architecture, the Intel Xeon Phi processor eliminates PCIe* bottlenecks, includes on-package high-bandwidth memory, and available integrated Intel Omni-Path fabric architecture to deliver fast, low-latency performance.”
In this podcast, the Radio Free HPC team looks at the new OpenCAPI interconnect standard. “Released this week by the newly formed OpenCAPI Consortium, OpenCAPI provides an open, high-speed pathway for different types of technology – advanced memory, accelerators, networking and storage – to more tightly integrate their functions within servers. This data-centric approach to server design, which puts the compute power closer to the data, removes inefficiencies in traditional system architectures to help eliminate system bottlenecks and can significantly improve server performance.”
In this video from the HPC Advisory Council Spain Conference, Martin Hilgeman from Dell Technologies provides a detailed overview of how to approach code optimization through providing more parallelism. “Martin Hilgeman brings perspectives of a system builder to the massively parallel performance discussion – examining the continuous advances in multi-core architectures and its impact on users and computational work.”
In this video, Dave Hart, CISL User Services Manager presents: Cheyenne – NCAR’s Next-Generation Data-Centric Supercomputing Environment. “Cheyenne is a new 5.34-petaflops, high-performance computer built for NCAR by SGI. The hardware was delivered on Monday, September 12, at the NCAR-Wyoming Supercomputing Center (NWSC) and the system is on schedule to become operational at the beginning of 2017. All of the compute racks were powered up and nodes booted up within a few days of delivery.”
“Being ready with full support for Intel Xeon Phi from day one has been a key strategy for Allinea and underpins our approach for supporting customers, such as Los Alamos National Laboratory on the Trinity system, Argonne National Laboratory on Theta and NERSC on Cori, where work is now underway to port code and get applications ready for more complex science on a larger scale.”
“The Lenovo HPC organization is delighted to welcome DDN into our HPC Innovation and Benchmark center and strengthen our close collaboration,” said Rick Koopman, EMEA Technical Lead HPC DCG HPC at Lenovo. “With DDN’s high-performance storage and Lustre filesystem solution, customers can easily facilitate proof of concept and benchmarking activities at our HPC Innovation center and more quickly determine the best solution for their needs. We are excited to support our HPC customers and partners in this way.”
In this video from the HPC Advisory Council Spain Conference, Dan Olds from OrionX discusses the High Performance Interconnect (HPI) market landscape, plus provides ratings and rankings of HPI choices today. “In this talk, we’ll take a look at the technologies and performance of high-end networking technology and the coming battle between onloading vs. offloading interconnect architectures.”
This week, IEEE announced that Dr. William Camp, Director Emeritus at Sandia National Laboratories, has been named the recipient of the 2016 IEEE Computer Society Seymour Cray Computer Engineering Award “for visionary leadership of the Red Storm project, and for decades of leadership of the HPC community.” Dr. Camp spent most of his career at NNSA’s Sandia Labs, at Cray Research and at Intel.
Supercomputing developers and experts from around the globe will converge on Salt Lake City, Utah for the 2016 Intel® HPC Developer Conference on November 12-13 – just prior to SC ‘16. Conference attendance is free, however, those interested in attending should register quickly as Intel is expecting a big response, reflecting the broadening demand for HPC learning opportunities among technical developers. road on to learn about the incredible presenter lineup this year.