In this podcast, the Radio Free HPC team looks at the European Processor Initiative, an effort to design a build an exascale computer based around European technology. “According to an interview in Primeur Magazine with EPI project coordinator Philippe Notton from Atos, the project involves not only a processor, but an accelerator as well. Will it be based on ARM, OpenPOWER, or something else like RISC-V? We will have to wait and see.”
Realizing Exabyte-scale PM Centric Architectures and Memory Fabrics
February 11, 2018 by
Zvonimir Bandic from Western Digital gave this talk at the SNIA Persistent Memory Summit. “Much has been debated about would it take to scale a system to exabyte main memory with the right levels of latencies to address the world’s growing and diverse data needs. This presentation will explore legacy distributed system architectures based on traditional CPU and peripheral attachment of persistent memory, scaled out through the use of RDMA networking.”
Video: Introduction to RISC-V
March 2, 2016 by
Mellanox announced today that it has joined the RISC-V foundation as a Founding Platinum Sponsor. The RISC-V foundation promotes the open RISC-V instruction set architecture and associated hardware and software ecosystem for a broad range of computing devices.
