Happy April Fool’s Day! It was as always an interesting week in the world of HPC-AI, this edition of HPC News Bytes includes commentary on: Microsoft and….
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HPC News Bytes 20240401: A $100B AI Data Center, Eviden Says It’s Healthy, Alibaba’s RISC-V Chip, New Optical Interconnect Group, Nvidia Fights CUDA Translation
April 1, 2024 by Leave a Comment
Achronix FPGAs Add Support for Bluespec’s RISC-V Chips
March 26, 2024 by Leave a Comment
March 26, 2024, SANTA CLARA, Calif. & FRAMINGHAM, Mass.– FPGA technology company Achronix Semiconductor Corporation and Bluespec, Inc., a RISC-V tools and silicon IP company, today announced a family of Linux-capable RISC-V soft processors that are available for the Achronix Speedster7t FPGA family. Marking an industry first, Bluespec’s RISC-V processors now integrate into the Achronix 2D […]
Tenstorrent Selects Blue Cheetah Chiplet Interconnect IP for AI and RISC-V Solutions
February 6, 2024 by
SUNNYVALE, Calif., Feb. 6, 2024 — Tenstorrent and Blue Cheetah Analog Design today announced that Tenstorrent has licensed Blue Cheetah’s die-to-die interconnect IP for its AI and RISC-V chiplet solutions. By selecting Blue Cheetah, Tenstorrent aims to accelerate its own as well as its customers’ and partners’ development of chiplet-based AI and RISC-V solutions. “Blue […]
SiFive Announces RISC-V Products for GenAI and ML
October 12, 2023 by
Santa Clara, Calif., Oct. 11, 2023 –- RISC-V computing company SiFive, Inc. today announced two products designed to address new requirements for high performance compute. The SiFive Performance P870 and SiFive Intelligence X390 offer a new level of low power, compute density, and vector compute capability, and when combined provide the necessary performance boost for […]
@HPCpodcast: An Architecture Update from RISC-V International CTO Mark Himelstein
July 6, 2023 by
Mark Himelstein, chief technology officer at RISC-V International, joins us to discuss the latest developments with the RISC-V instruction set architecture and its growing community and footprint. Topics include: HPC use cases from sensors to supercomputer, achieving customization without loss of compatibility, AI and its impact on chips and systems, and the question on everyone’s mind: when will we see RISC-V in servers and supercomputers? Himelstein also looks at RISC-V’s design wins, including EuroHPC’s backing of R&D to develop HPC hardware and software based on RISC-V. You may also be interested in Shahin’s conversation with Mark in August 2020 to hear how things have evolved since then.
Bluespec Launches MCUX RISC-V Processor
June 27, 2023 by
Framingham, Mass. – June 27, 2023 – Bluespec Inc. today announced its new MCUX RISC-V processor designed to ease implementation of custom instructions and the addition of accelerators to FPGAs and ASICs. The MCUX is an extension of Bluespec’s MCU RISC-V processor family, which is targeted at ultra-low resource utilization on FPGAs. Bluespec said the […]
UK Startup VyperCore Says Its RISC-V Chip’s Memory Management Innovation Delivers 10X Performance Boost
May 4, 2023 by
A UK chip startup, VyperCore, says it has come up with a memory management scheme that does a software layer end-around and delivers as much as a 10x throughput improvement for high performance, general-purpose workloads without code modification. The company’s core insight, as described in a recent EE Times article: move “away from the processor’s […]
Tenstorrent Selects Arteris IP for HPC RISC-V Chiplets
May 2, 2023 by
CAMPBELL, Calif. – May 2, 2023 – Arteris, Inc. (Nasdaq: AIP), a provider of system IP designed to accelerate system-on-chip (SoC) creation, today announced that Tenstorrent, the Toronto-based AI chip startup, has licensed Ncore and FlexNoC interconnect IP for its AI chiplet systems. According to Arteris, the flexible network-on-chip (NoC) interconnect meets the demanding time-to-market […]
RISC-V Chip Maker SiFive Joins OpenMP Review Board
March 14, 2023 by
Beaverton, Oregon — March 14, 2023 — SiFive has joined the OpenMP Architecture Review Board (ARB), a group of hardware vendors, software vendors and research organizations, in creating the standard for the OpenMP shared-memory parallel programming model. SiFive is a RISC-V-based high-performance embedded systems platform company, delivering high-performance compute density for modern workloads. SiFive solutions are […]
RISC-V Summit China 2022 Announces Agenda
August 12, 2022 by
Shanghai, August 12, 2022 – The RISC-V Summit China 2022 (Aug. 24-26) today announced its 2022 agenda, including keynotes, tutorials, and technical presentations in English language and Chinese language editions. This year’s summit includes more than 80 tech talks, showcases, and tutorials and will include presentations in both Chinese and English. The RISC-V Summit brings together innovators, […]
