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Call for Submissions: OpenMPCon and IWOMP 2019 in New Zealand

The OpenMP community has issued its Call for Submissions for OpenMPCon 2019 and IWOMP 2019. The events take place September 9-13 in Auckland, New Zealand. “OpenMPCon is the annual conference for OpenMP developers to discuss of all aspects of parallel programming with OpenMP. The International Workshop on OpenMP (IWOMP) is an annual workshop dedicated to the promotion and advancement of all aspects of parallel programming with OpenMP.”

Reflections on HPC Past, Present, and Future

In this special guest feature, Joe Landman from Scalability.org looks at technology trends that are driving High Performance Computing. “HPC has been moving relentlessly downmarket. Each wave of its motion has a destructive impact upon the old order, and opens up the market wider to more people. All the while growing the market.”

OpenMP API Specification 5.0 is Major Upgrade of OpenMP Language

The OpenMP Architecture Review Board (ARB) announced Version 5.0 of the OpenMP API Specification, a major upgrade of the OpenMP language. OpenMP 5.0 adds many new features that will be useful for highly parallel and complex applications and now covers the entire hardware spectrum from embedded and accelerator devices to multicore systems with shared-memory. Vendors have made reference implementations of parts of the standard, and user courses will soon be given at OpenMP workshops and major conferences.

Video: Intro to OpenMP

In this video, Markus Eisenbach and Dmitry Liakh from ORNL present: Intro to OpenMP, Part 1. “This video was recorded as part of the “Introduction to HPC” workshop that took place at ORNL from June 26-28. This is video 1 of 2, which gives a brief overview of parallel computing with OpenMP.”

Celebrating 20 Years of the OpenMP API

“The first version of the OpenMP application programming interface (API) was published in October 1997. In the 20 years since then, the OpenMP API and the slightly older MPI have become the two stable programming models that high-performance parallel codes rely on. MPI handles the message passing aspects and allows code to scale out to significant numbers of nodes, while the OpenMP API allows programmers to write portable code to exploit the multiple cores and accelerators in modern machines.”

Barbara Chapman Joins Board of OpenMP ARB

Today the OpenMP Architecture Review Board (ARB) announced the appointment of Barbara Chapman to its Board of Directors. “We are delighted to have Prof. Chapman join the OpenMP Board”, says Partha Tirumalai, chairman of the OpenMP Board of Directors. “Her decades of experience in high-performance computing and education will enhance the value OpenMP brings to users all over the world.”

Building a GPU-enabled and Performance-portable Global Cloud-resolving Atmospheric Model

Richard Loft from NCAR gave this talk at the NVIDIA booth at SC17. “The objectives of NCAR’s exploration of accelerator architectures for high performance computing in recent years has been to 1) speed up the rate of code optimization and porting and 2) understand how to achieve performance portability on codes in the most economical and affordable way.

Call for Sessions: UK OpenMP User Conference

The UK OpenMP User Conference has issued its Call for Sessions. The event takes place May 21-22 at St Catherine’s College in Oxford. “This inaugural event is intended to become the annual meeting of the growing UK-based community of developers who use OpenMP.”

OpenMP ARB Releases New Technical Report and Asks for Feedback

In this video from SC17 in Denver, Michael Klemm from the OpenMP ARB describes how the OpenMP programming community is moving forward to new levels of scalable performance. The OpenMP Architecture Review Board (ARB) is seeking feedback on the newly released Technical Report 6.

Podcast: Optimizing Cosmos Code on Intel Xeon Phi

In this TACC podcast, Cosmos code developer Chris Fragile joins host Jorge Salazar for a discussion on how researchers are using supercomputers to simulate the inner workings of Black holes. “For this simulation, the manycore architecture of KNL presents new challenges for researchers trying to get the best compute performance. This is a computer chip that has lots of cores compared to some of the other chips one might have interacted with on other systems,” McDougall explained. “More attention needs to be paid to the design of software to run effectively on those types of chips.”