Entries filed under “HPC Hardware”

Hardware news and announcements in technologies related to HPC.

Video: Titan Supercomputer Session Showcases Science on GPUs

In this video from GTC 2012, Jack Wells, Director of Science at ORNL introduces a series of talks on the research that will be accelerated by the hybrid Titan supercomputer.

The whole system is an upgrade,” said Jack Wells in describing how Oak Ridge’s current Jaguar supercomputer is being transformed into Titan. ORNL is transitioning from Cray’s XT5 compute blades to their XK6 compute blades, which use hybrid chipsets comprised of AMD Opteron CPUs and NVIDIA Tesla GPUs. Application benchmarks conducted thus far have demonstrated that the XK6 is yielding performance improvements ranging from 50 percent to 230 percent compared with the XT5.

The following talks comprised the rest of the session:

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Allinea DDT CUDA Education Pack for Student Programmers

This week Allinea Software announced the launch of a new DDT CUDA Education pack, designed to help teach the art of debugging CUDA.

This is a big step forward in educating the programmers of the future on GPU computing. It gives students access to a robust and powerful debugging tool within their institution’s budget,” added David Luebke, senior director of research and head of academic research programs at NVIDIA.

The pack contains annual subscriptions to a classroom-sized set of CUDA scalar workstation licences, white papers on debugging CUDA, and complete lecture notes suitable for introductory CUDA debugging and hands-on walkthrough examples and exercises. Read the Full Story.

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ARCHIE Boosts Research at Scottish Universities

A high-performance computer that can tackle complex calculations to solve major challenges in science and engineering, including drug development, energy systems and space technologies research, has been installed at the University of Strathclyde, UK.

The computer is at the core of a new £1.6 million regional Supercomputing Centre, funded by the Engineering and Physical Sciences Research Council (EPSRC), which will help academics further their research and support business and industry through the next generation of product design and development.

Professor David Littlejohn, associate deputy principal at the University of Strathclyde, said: ‘The new centre will make a step-change in high-performance computing provision for Scotland, helping researchers to work with industrial colleagues from around the world to develop and test innovative new products and technologies.

‘Our plans for the centre have received overwhelming support from industry, and we are delighted that the EPSRC has chosen to invest in our infrastructure and the work of our internationally leading scientists and engineers.’

The advanced computer is known as ARCHIE (Academic and Research Computer Hosting Industry and Enterprise), and was the result of a successful funding bid submitted by scientists Professor Littlejohn, Professor Maxim Federov and Dr Richard Martin, and engineers Professor Jason Reese and Dr Paul Mulheran.

The funding will enable multidisciplinary researchers at the Universities of Strathclyde, Glasgow, Glasgow Caledonian, Stirling and the University of the West of Scotland to access the Supercomputing Centre and link up with other supercomputing centres around the world.

They will work with public and private sector partners in a wide range of research areas, including the purification of seawater, renewable energy, the next generation of mobile communications and improved air transport systems.

This story originally appeared on HPC Projects. It appears here as part of a cross-publishing agreement with Scientific Computing World.

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Podcast: Spectra to Deliver 380 Petabytes of Tape Storage to Blue Waters

In this podcast, Michelle Butler from NCSA and Molly Rector from Spectra Logic discuss the massive tape storage system that is being deployed for the 10 Petaflop Blue Waters supercomputer. As announced this week, the Blue Waters system will be one of the world’s largest active file repositories stored on tape media and will scale to a capacity of 380 raw petabytes within the first two years of operation.

NCSA designed Blue Waters to be one of the largest, most powerful supercomputing ecosystems in the world,” said Bill Kramer deputy director of the Blue Waters project at the National Center for Supercomputing Applications at the University of Illinois at Urbana-Champaign. “The Spectra Logic T-Finity met our rigorous requirements with its high enterprise-level performance, ready data accessibility and massively scalable capacity. We are confident it will provide our user community with fast, reliable access to the massive volumes of critical data stored within Blue Waters’ Petascale near-line file repository.”

Spectra T-Finity tape libraries will provide the Blue Waters project with the ability to keep all near-line data accessible in an active repository, perform automated data integrity verification for the data store, and deliver high performance read/write rates of up to 2.2 PBs per hour utilizing enterprise TS1140 Technology tape drives.

Read the Full Story *  Download the MP3Subscribe on iTunes * If Dropbox is blocked, download from this Google page.

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Video: GTC 2012 Full Keynote

Last week, Nvidia CEO Jen-Hsun Huang rolled out the new Kepler GPUs at his GTC 2012 keynote. And while this video is available elsewhere in pieces, we thought it would be worthwhile to stitch it together as one streaming movie for our readers.

Note: Many of the GTC 2012 talks are now available as streaming video, and we plan to highlight some of our favorites in the coming days.

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Podcast: DDN WOS Software on OCP Storage Hardware to Enable Hyperscale Storage Clouds

In this podcast, Jeff Denworth from DDN provides details on the company’s recent announcement that their Web Object Scaler (WOS) will support Open Compute server and storage platforms in cooperation with the Open Compute Project.

Historically, there has not been an industry movement around standardizing and driving the adoption of mass-market hyperscale hardware technology,” said Jean-Luc Chatelain, Executive Vice President of Strategy and Technology, DDN. “With the new OCP storage hardware specification, DDN is able to focus its cloud storage efforts and investments on the software intelligence that drives today’s business and social connection. The Open Compute movement allows us to harness the power of crowd-sourced hardware design and a highly optimized supply chain to drive the best value for our customers.”

Read the Full Story *  Download the MP3Subscribe on iTunes * If Dropbox is blocked, download from this Google page.

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Video: GPUs Accelerate Risk Analysis for Financial Services

In this video, Pierre Spatz from Murex and Alastair Houston from Nvidia discuss how GPUs are being successfully used to run financial risk analysis at higher speeds and for less cost. Recorded at GTC 2012 in San Jose.

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Kepler K10 Single-Precision GPU Speeds Oil & Gas

Nvidia has announced the launch of an accelerator designed to meet what it describes as the two most difficult challenges in high-performance computing.

The Tesla K10 is aimed at seismic data processing in oil and gas exploration, as well as signal and image processing in the defence industry. The company claims it is based on the fastest, most efficient and highest-performance computing architecture ever built.

The Kepler architecture enables two high-performance Tesla K10 GPUs to be placed on a single accelerator board. It delivers an aggregate performance of 4.58 teraflops of single-precision floating point and 320 gigabytes per second memory bandwidth.

Seismic processing uses large data centers to crunch through petabytes of information about the Earth’s subsurface area, generated from reflected seismic waves. Geophysicists analyse the resulting 2D and 3D images to discover oil and gas deposits, and to determine the best and safest locations to drill.

In addition, the Tesla K10 can help agencies increase national security by improving the quality, and speeding the delivery of, actionable video analytics and image forensics to security and law-enforcement officials.

GPUs speed up by as much as 100 times the process of analysing thousands of video feeds generated by security cameras and drones, enabling analysts to better identify events and individuals of interest.

This story originally appeared on HPC Projects. It appears here as part of a cross-publishing agreement with Scientific Computing World.

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Interview: Author Rob Farber on the Secret Sauce for Programmers in the Kepler GPU

In this video, Rob Farber discusses new features in the Nvidia Kepler GPUs that make it easier for programmers to maximize application performance. Recorded at GTC 2012 in San Jose.

Farber’s book, CUDA Application Design and Development was the best-selling title at SC11 and at GTC 2012 this year. The book is designed to meet the needs of working software developers who need to understand GPU programming with CUDA and increase efficiency in their projects.

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New Whitepaper: NVIDIA’s Next-Gen CUDA Compute Architecture – Kepler GK110

If you still looking for more details on the new Kepler GPUs, Nvidia has stepped up with a new GK110 Architecture whitepaper for you.

Comprising 7.1 billion transistors, Kepler GK110 is not only the fastest, but also the most architecturally complex microprocessor ever built. Adding many new innovative features focused on compute performance, GK110 was designed to be a parallel processing powerhouse for Tesla and the HPC market. Kepler GK110 will provide over 1 TFlop of double precision throughput with greater than 80% DGEMM efficiency versus 60‐65% on the prior Fermi architecture. In addition to greatly improved performance, the Kepler architecture offers a huge leap forward in power efficiency, delivering up to 3x the performance per watt of Fermi.  

Is the news all good? Blogger Paul Caheny writes that the K10 in particular continues a disturbing downward trend on memory capacity per FLOPs.

A couple of high level observations on how this fits into general HPC architecture trends. Firstly the ratio of memory capacity and memory bandwidth to compute is likely to continue to decrease, signifying the increasing necessity to make use of strong scaling in applications rather than the previously rich seam of weak scaling. K10 represents a more than 60% fall in Bytes/FLOPs (memory capacity per FLOPs) compared to M2090 and a reduction of 50% in Bytes/sec/FLOPs (memory bandwidth per FLOPs) compared to M2090 (both using SP FLOPs as per K10′s target market). It will be interesting to see what the corresponding numbers are for the upcoming K20.

Download the whitepaper (PDF).

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GPUs Power Penguin Computing, from HPC to Cloud and on to the Enterprise

In this video, Tom Coull from Penguin Computing describes the company’s GPU-powered computing solutions for HPC. Penguin On Demand has offered GPUs in the Cloud for years, and the recent Kepler GPU announcement from Nvidia is figuring prominently in Penguin’s plans.

Coulll also describes Penguin Computing’s move to provide enterprise customers with the same powerful server and storage solutions that have powered its HPC customers.

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GPUs Power Part-Time Scientists’ Plan for Lunar Rover Autonomy

Today at the GTC 2012 conference, a team calling themselves the Part-Time Scientists presented plans for their GPU-powered lunar rover entry in the Google Lunar X Prize.

The autonomous navigation system of Asimov is a major technological leap. While the Russian Moon rovers Lunokhod 1 and 2 in the early 70s were fully controlled from Earth, today’s Mars rovers like NASA’s Mars Exploration Rover “Opportunity”, which has been tirelessly exploring the Red Planet since 2004, are autonomous. However, Opportunity requires nearly three minutes to process a pair of images – a delay that causes it to move at an average speed of just 1 cm/sec or less. New developments by the technology partnership between the DLR Institute of Robotics and Mechatronics (RMC) and the PTS have created, for the first time, an autonomous navigation system for a rover that has the capacity to process multiple images per second. The technology boosts a stereo camera that Asimov will use to calculate its own motion, generate a 2.5-dimensional environmental model, evaluate the site and determine a collision-free path – all in real time.

Read the Full Story.

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Massively Parallel Simulation Counters Antibiotic Resistance

A solution to the problem of antibiotic-resistant bacteria may be closer, as a result of a computer science project to investigate ways of making legacy software run efficiently on heterogeneous systems, the Nvidia GPU Technology Conference was told on 16 May.

Simon McIntosh-Smith, of the University of Bristol in the UK, presented results from a project that ported a very large molecular modelling program to systems with a mix of conventional CPUs and also GPUs. One early result has been the identification of around ten small molecules that could block the biological pathway that creates antibiotic resistance in bacteria. So confident are the researchers in their predictions that the candidate drug molecules are now being synthesised in the laboratory.

Typically, biomolecules such as proteins can be made up from between a thousand and two thousand atoms, whereas the docking molecules, the ligands, will be an order of magnitude smaller – about 50 to 100 atoms. The software is BUDE – the Bristol University Docking Engine – is used to predict the structure of small molecules that can bind tightly to the active sites in large biological molecules. It processes tens of millions of candidate ligands and uses a genetic algorithm-like methodology to select those that bind most tightly, using energy minimisation calculations. It is, said McIntosh-Smith, a very large piece of code, in the region of hundreds of thousands of lines of Fortran. However, only a few thousand lines needed to be ported across to GPU processors.

Because the ten million or so ligands all come in slightly different flavours – they have flexible side chains, for example – the project represents “an embarrassment of parallelism,” he continued. “When we get down to one molecule, we want to test it in many different positions and rotations, so we have even more parallelism.”

Only two results are outside the desirable bounds, so ‘we are now getting very accurate simulation results,’ McIntosh-Smith said. By porting the code across to a heterogeneous CPU+GPU system, he reported a factor of 20 increase in the speed of computation and a factor of 10 improvement in energy efficiency.

The simulation to try to find ligands that would block recently emerged antibiotic-resistance in a bacterium found in Asia took four days and surveyed more than 8 million candidate molecules. Once, he pointed out, it would have taken the biggest and fastest supercomputers in the world to do the calculation, which can now be done by a university research group.

This story originally appeared on HPC Projects. It appears here as part of a cross-publishing agreement with Scientific Computing World.

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GPU Proliferation in HPC Reflected in SC Conference Showfloor

Our GTC 2012 coverage continues with Dan Olds’s report on the rapid spread of Cuda and GPU computing. One measure is its increased presence the annual Supercomputing Conference series.

This story is perhaps best told via pictures. In this first picture, we’re looking at the booth layout of the SC07 show floor in Reno. Like a typical SC show, there were a few hundred exhibitors ranging from hardware, software, and service vendors to academic institutions, research labs, and government research organizations. The sole presence of hybrid computing is the tiny green dot at the upper left of the schematic. It’s NVIDIA’s small booth – the lone beachhead for GPU-accelerated HPC. Fast-forward four years and… look at the progress. The SC11 show floor diagram is literally covered with green squares and rectangles.”

Read the Full Story.

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DoD HPC Mod to Double Compute Capacity with Four Petaflop Upgrade

The Department of Defense High Performance Computing Modernization Program (DOD HPCMP) has just completed its largest one-time investment in supercomputing capability supporting the science, engineering, test and acquisition communities of the DoD. The total acquisition is valued at $105 million, and includes $80 million for multiple systems along with an additional $25 million in hardware and software maintenance services. This will more than double the DOD HPCMP’s current sustained computing capability.

This latest acquisition will provide significant capability for DOD scientists and engineers to stretch the boundaries of scientific discovery, expand engineering capabilities and accelerate the delivery of new technologies to the defense communities,” observed John West, director of the HPCMP. The purchase includes seven systems that will collectively provide over 225,000 cores, over 520 gigabytes of memory and a total storage capacity of 23 petabytes. Each system is scheduled to be fully accepted and operational by the end of the calendar year.

The HPC vendors participating in the system deployments include IBM, SGI and Cray, Inc. Read the Full Story.

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