Researchers at the Future Technologies Group at Oak Ridge National Laboratory (ORNL) have developed a novel programming system that extends C with intuitive, language-level support for programming NVM as persistent, high-performance main memory; the prototype system is named NVL-C.
“The promising new parameter in place of the transistor count is the perceived increase in the capacity and bandwidth of storage, driven by device, architectural, as well as packaging innovations: DRAM-alternative Non-Volatile Memory (NVM) devices, 3-D memory and logic stacking evolving from VIAs to direct silicone stacking, as well as next-generation terabit optics and networks. The overall effect of this is that, the trend to increase the computational intensity as advocated today will no longer result in performance increase, but rather, exploiting the memory and bandwidth capacities will instead be the right methodology.”
Today DDN announced the highest bookings quarter in the company’s history with double-digit year-over-year growth.
In this video, the Radio Free HPC team looks at the newly announced 3D XPoint technology from Intel and Micron. “3D XPoint ushers in a new class of non-volatile memory that significantly reduces latencies, allowing much more data to be stored close to the processor and accessed at speeds previously impossible for non-volatile storage.”
Today Intel Corporation and Micron Technology unveiled 3D XPoint technology, a non-volatile memory that has the potential to revolutionize any device, application or service that benefits from fast access to large sets of data. Now in production, 3D XPoint technology is a major breakthrough in memory process technology and the first new memory category since the introduction of NAND flash in 1989.
NVM Express is a specification for accessing solid-state drives (SSDs) attached through the PCI Express (PCIe) bus. “NVM” stands as an acronym for non-volatile memory, which is used in SSDs. As a logical device interface, NVM Express has been designed from the ground up, capitalizing on the low latency and parallelism of PCI Express SSDs, and mirroring the parallelism of contemporary CPUs, platforms and applications. By allowing parallelism levels offered by SSDs to be fully utilized by host’s hardware and software, NVM Express brings various performance improvements.
“The DDN Infinite Memory Engine (IME) unleashes a new I/O provisioning paradigm. This breakthrough, software defined storage application introduces a whole new new tier of transparent, extendable, non-volatile memory (NVM), that provides game-changing latency reduction and greater bandwidth and IOPS performance for the next generation of performance hungry scientific, analytic and big data applications – all while offering significantly greater economic and operational efficiency than today’s traditional disk-based and all flash array storage approaches that are currently used to scale performance.”
In this video from the 2015 OFS Developer’s Workshop, Bernard Metzler presents: Prototyping Byte-Addressable NVM Access.
Today the Open Fabrics Alliance announced that their upcoming International OFS Developers’ Workshop will center around three major themes: Applications Performance, Non-Volatile Memory, and Systems-on-a-Chip (SoCs).
NVM is coming. In this series of videos from the OpenFabrics International Developer Workshop 2014, Jim Ryan and Doug Voight describe Non-Volatile Memory as a disruptive technology for HPC.