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Intel Steps up to HPC & the Enterprise with FPGAs

In this video from the Intel HPC Developer Conference in Denver, Michael Strickland describes how Intel FPGAs are  powering new levels of performance and datacenter efficiency with FPGAs. “Altera and Intel offers a broad range of FPGA devices – from the high performaning Stratix series to the flexible MAX 10 – so you can find a device that best meets your business needs.”

Accelerating Cryo-EM with Intel Technologies

In this video from the Intel HPC Developer Conference, Erik Lindahl from Stockholm University describes the challenges of cryo-EM, a technique that fires beams of electrons at proteins that have been frozen in solution, to deduce the biomolecules’ structure. “Structural biology is going through a revolution where cryo-EM now determine 3D structures from 100,000s of noisy images, but it relies on very large computations. I will present our work with Intel to accelerate the RELION program with x86 SIMD, TBB, and MKL to provide outstanding performance.”

Intel and the Coming AI Revolution

In this video from the Intel HPC Developer Conference, Gadi Singer from Intel describes how the company is moving forward with Artificial Intelligence. “We are deeply committed to unlocking the promise of AI: conducting research on neuromorphic computing, exploring new architectures and learning paradigms.”

Video: Applying AI to Science

In this video from the Intel HPC Developer Conference, Prabhat from NERSC describes how AI applies to science. “Looking ahead, Prabhat sees broad applications for deep learning in scientific research beyond climate science—especially in astronomy, cosmology, neuroscience, material science, and physics.”

Register Now For the Intel HPC Developer Conference 2017

Powerful technologies today fuel tomorrow’s HPC and High-Performance Data Analytics innovations and help organizations accelerate toward discoveries. Get ahead of the curve at the Intel HPC Developer Conference 2017 in Denver, Colorado on November 11-12.

Agenda Posted for Intel HPC Developer Conference at SC17

The Intel HPC Developer conference at SC17 has posted its Session Agenda. The conference takes place Nov. 11-12 in Denver. “The Intel HPC Developer Conference is the premier technical training event to meet and hear from Intel architecture experts and connect with HPC industry leaders. Join in to learn what’s next in HPC, attend technical sessions, hands-on tutorials, and poster chats that cover parallel programming, high productivity languages, artificial intelligence, systems, enterprise, visualization development and much more.”

Call for Abstracts: Intel HPC Developer Conference at SC17

“The Intel HPC Developer Conference 2017 has become the place for developers to learn about the latest trends, developments, and the future of HPC. By submitting an abstract and speaking at the conference you will be able to reach top-level decision makers within the HPC industry.”

CERN openlab Joins Intel Modern Code Developer Challenge

James Reinders writes that a new Intel Modern Code Developer Challenge has teamed up with CERN openlab. “It is always an exciting time when I get to announce a Modern Code Developer Challenge from my friends at Intel, but it is even more special when I get to announce a collaboration with the brilliant minds at CERN. Beginning this month (July 2017), and running for nine weeks, five exceptional students participating in the CERN openlab Summer Student Programme are working to research and develop solutions for five modern-code-centered challenges.”

Video: Supermicro Showcases Machine Learning Solutions on Intel Architecture

In this video from the Intel HPC Developer Conference, Akira Sano from Supermicro describes the company’s Machine Learning Solutions on Intel Architecture. “Our server systems, subsystems and accessories are architecturally designed to provide high levels of reliability, quality and scalability, thereby enabling our customers benefits in the areas of compute performance, density, thermal management and power efficiency to lower their overall total cost of ownership.”

Scaling Machine Learning Software with Allinea Tools

“The majority of deep learning frameworks provide good out-of-the-box performance on a single workstation, but scaling across multiple nodes is still a wild, untamed borderland. This discussion follows the story of one researcher trying to make use of a significant compute resource to accelerate learning over a large number of CPUs. Along the way we note how to find good multiple-CPU performance with Theano* and TensorFlow*, how to extend a single-machine model with MPI and optimize its performance as we scale out and up on both Intel Xeon and Intel Xeon Phi architectures.”