HPE and Ayar Labs Partner to Bring Optical I/O to Slingshot Fabric for HPC and AI

HPC systems leader Hewlett Packard Enterprise and startup Ayar Labs, maker of chip-to-chip optical I/O connectivity, today announced a strategic collaboration to integrate silicon photonics within HPE’s high performance Slingshot fabric. Longer term, HPE envisions future generations of HPC systems interconnects significantly enhanced by optical I/O, which is a silicon photonics-based technology that uses light instead of electricity to transmit data. The technology addresses both the need for higher data rates and improved energy efficiency (see “Composable HPC-AI at Scale: The Emergence of Optical I/O Chiplets”).

Composable HPC-AI at Scale: The Emergence of Optical I/O Chiplets

The allure of “technology resource disaggregation” – a.k.a., composable computing – doesn’t get old. It’s an ingenious yet common-sense strategy for addressing our increasingly heterogeneous HPC-AI world where no single system can cost-effectively satisfy the range of workloads needed to be kept in play, each workload having its own unique combination of system requirements that would otherwise produce, in a single system, “marooned” resources that sap budgets. Put another way, with a composable HPC infrastructure there are pools of compute, memory, and storage resources enabling the dynamic assembly of customized nodes on a per-workload basis, offering configuration of “Goldilocks” solutions.

NeoPhotonics Introduces CFP2-DCO Module with 0 dBm Optical Output Power

SAN JOSE — September 8, 2021 – NeoPhotonics Corporation (NYSE: NPTN), a developer of silicon photonics and advanced hybrid photonic integrated circuit-based lasers, modules and subsystems for bandwidth-intensive, high speed communications networks, today announced a high output power version of its 400G Multi-Rate CFP2-DCO coherent pluggable transceiver with 0 dBm output power.  The transceiver is […]

Intel Demonstrates Industry-First Co-Packaged Optics Ethernet Switch

Today Intel announced that it successfully integrated its 1.6 Tbps silicon photonics engine with its 12.8 Tbps programmable Ethernet switch. The co-packaged switch optimized for hyperscale data centers brings together the essential technology building blocks from Intel and its Barefoot Networks Division. Our co-packaged optics demonstration is the first step to making optical I/O with silicon photonics a reality,” said Hong Hou, Intel corporate vice president and general manager of the Silicon Photonics Products Division. “We share the industry belief that co-packaged optics offers power and density advantages for switches at 25 Tbps and higher, and ultimately is a necessary and enabling technology for bandwidth scalability in future networks. The timing of this demonstration shows the technology is ready to support our customers’ requirements.”

New Paper: Nanophotonic Neural Networks coming Closer to Reality

Over at the Intel AI blog, Casimir Wierzynski writes that Optical Neural Networks have exciting potential for power-efficiency in AI computation. “At last week’s CLEO conference, we and our collaborators at UC Berkeley presented new findings around ONNs, including a proposal for how that original work could be extended in the face of real-world manufacturing constraints to bring nanophotonic neural network circuits one step closer to a practical reality.”

Video: Silicon Photonics for Extreme Computing

Keren Bergman from Columbia University gave this talk at the 2017 Argonne Training Program on Extreme-Scale Computing. “Exaflop machines would represent a thousand-fold improvement over the current standard, the petaflop machines that first came on line in 2008. But while exaflop computers already appear on funders’ technology roadmaps, making the exaflop leap on the short timescales of those roadmaps constitutes a formidable challenge.”

Slidecast: Silicon Photonics for HPC Interconnects

Brian Welch from Luxtera describes how the company delivers a broad range of disruptive computer communications with silicon photonics.